AT84AD001BCTD ATMEL [ATMEL Corporation], AT84AD001BCTD Datasheet - Page 21

• Manufacturer Part Number: AT84AD001BCTD
• Description: Dual 8-bit 1 Gsps ADC
• Manufacturer: ATMEL [ATMEL Corporation]

Table 10. AT84AD001B LQFP 144 Pin Description (Continued)
2153C–BDC–04/04
Symbol
CLKQN
DDRB
DDRBN
DOAI0, DOAI1, DOAI2, DOAI3, DOAI4,
DOAI5, DOAI6, DOAI7
DOAI0N, DOAI1N, DOAI2N, DOAI3N,
DOAI4N, DOAI5N, DOAI6N, DOAI7N,
DOBI0, DOBI1, DOBI2, DOBI3, DOBI4,
DOBI5, DOBI6, DOBI7
DOBI0N, DOBI1N, DOBI2N, DOBI3N,
DOBI4N, DOBI5N, DOBI6N, DOBI7N
DOAQ0, DOAQ1, DOAQ2, DOAQ3,
DOAQ4, DOAQ5, DOAQ6, DOAQ7
DOAQ0N, DOAQ1N, DOAQ2N, DOAQ3N,
DOAQ4N, DOAQ5N, DOAQ6N, DOAQ7N
DOBQ0, DOBQ1, DOBQ2, DOBQ3,
DOBQ4, DOBQ5, DOBQ6, DOBQ7
DOBQ0N, DOBQ1N, DOBQ2N,
DOBQ3N, DOBQ4N, DOBQ5N,
DOBQ6N, DOBQ7N
DOIRI
DOIRIN
DOIRQ
DOIRQN
MODE
CLK
DATA
LND
CLKOI
Pin number
128
126
127
117, 113, 105, 101, 93, 89, 81, 77
118, 114, 106, 102, 94, 90, 82, 78
119, 115, 107, 103, 95, 91, 83, 79
120, 116, 108, 104, 96, 92, 84, 80
136, 140, 4, 8, 16, 20, 28, 32
135, 139, 3, 7, 15, 19, 27, 31
134, 138, 2, 6, 14, 18, 26, 30
133, 137, 1 ,5, 13, 17, 25, 29
75
76
34
33
74
73
72
71
121
Function
Inverted phase (-) clock input signal
(CLKQ)
Synchronous data ready reset I and Q
Inverted phase (-) of input signal (DDRB)
In-phase (+) digital outputs first phase
demultiplexer (channel I) DOAI0 is the
LSB. D0AI7 is the MSB
Inverted phase (-) digital outputs first
phase demultiplexer (channel I) DOAI0N
is the LSB. D0AI7N is the MSB
In-phase (+) digital outputs second phase
demultiplexer (channel I) DOBI0 is the
LSB. D0BI7 is the MSB
Inverted phase (-) digital outputs second
phase demultiplexer (channel I) DOBI0N
is the LSB. D0BI7N is the MSB
In-phase (+) digital outputs first phase
demultiplexer (channel Q) DOAI0 is the
LSB. D0AQ7 is the MSB
Inverted phase (-) digital outputs first
phase demultiplexer (channel Q) DOAI0N
is the LSB. D0AQ7N is the MSB
In-phase (+) digital outputs second phase
demultiplexer (channel Q) DOBQ0 is the
LSB. D0BQ7 is the MSB
Inverted phase (-) digital outputs second
phase demultiplexer (channel Q)
DOBQ0N is the LSB. D0BQ7N is the MSB
In-phase (+) out-of-range bit input
(I phase) combined demultiplexer
out-of-range is high on the leading edge of
code 0 and code 256
Inverted phase of output signal DOIRI
In-phase (+) out-of-range bit input
(Q phase) combined demultiplexer
out-of-range is high on the leading edge of
code 0 and code 256
Inverted phase of output signal DOIRQ
Bit selection for 3-wire bus interface or
nominal setting
Input clock for 3-wire bus interface
Input data for 3-wire bus
Beginning and end of register line for
3- wire bus interface
Output clock in-phase (+) channel I
AT84AD001B
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