74LVC2G74DP NXP [NXP Semiconductors], 74LVC2G74DP Datasheet - Page 10

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74LVC2G74DP

Manufacturer Part Number
74LVC2G74DP
Description
Single D-type flip-flop with set and reset; positive edge trigger
Manufacturer
NXP [NXP Semiconductors]
Datasheet

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NXP Semiconductors
12. Waveforms
Table 10.
74LVC2G74_3
Product data sheet
Supply voltage
V
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
4.5 V to 5.5 V
Fig 7. The clock input (CP) to output (Q, Q) propagation delays, the clock pulse width, the D to CP set-up, the
CC
Measurement points are given in
The shaded areas indicate when the input is permitted to change for predictable output performance.
V
CP to D hold times and the CP maximum frequency
OL
Measurement points
and V
OH
are typical output voltage levels that occur with the output load.
CP input
Q output
Q output
D input
Table
GND
GND
V
V
V
V
OH
OH
OL
OL
V
V
Input
V
0.5
0.5
1.5 V
1.5 V
0.5
I
I
M
10.
V
V
V
V
M
t
CC
CC
CC
PLH
t
Single D-type flip-flop with set and reset; positive edge trigger
su
Rev. 03 — 9 August 2007
t
V
h
M
V
V
M
M
t
PHL
1/f
max
t
W
t
PHL
t
su
t
h
Output
V
0.5
0.5
1.5 V
1.5 V
0.5
M
mnb141
t
PLH
V
V
V
CC
CC
CC
74LVC2G74
© NXP B.V. 2007. All rights reserved.
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