PCF8531U2D NXP [NXP Semiconductors], PCF8531U2D Datasheet - Page 31

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PCF8531U2D

Manufacturer Part Number
PCF8531U2D
Description
34 x 128 pixel matrix driver Single-chip LCD controller and driver
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
PCF8531
Product data sheet
Fig 19. Master transmits to slave receiver; write mode
S 0 1 1 1 1 0
slave address
10.3 Command decoder
from PCF8531
S
A
acknowledge
0
R/W
The command decoder identifies command words that arrive on the I
significant bit of a control byte is the continuation bit Co. If this bit is logic 1, it indicates
that only one data byte (either command or RAM data) will follow. If this bit is logic 0, it
indicates that a series of data bytes (either command or RAM data) may follow. The DB6
bit of a control byte is the RAM data/command bit RS. When this bit is logic 1, it indicates
that another RAM data byte will be transferred next. If the bit is logic 0, it indicates that
another command byte will be transferred next.
0 A
Fig 18. Slave address and control byte
Pairs of bytes; information in the second byte, the first byte determines whether
information is display or instruction data
Stream of information bytes after Co = 0; display or instruction data, depending on last
RS.
Co
1
RS
S
0
control byte
1
All information provided in this document is subject to legal disclaimers.
from PCF8531
acknowledge
slave address
1
2n ≥ 0 bytes
A
1
Rev. 6 — 16 May 2011
1
data byte
0
SA0
from PCF8531
acknowledge
R/W
A
A
Co
0
RS
control byte
1 byte
Co RS
from PCF8531
acknowledge
A
34 x 128 pixel matrix driver
MSB . . . . . . . . . . . LSB
X
control byte
data byte
n ≥ 0 bytes
X
2
X
C-bus. The most
PCF8531
© NXP B.V. 2011. All rights reserved.
from PCF8531
acknowledge
X
mgs475
A P
X
mgs474
X
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