PCF8531U2D NXP [NXP Semiconductors], PCF8531U2D Datasheet

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PCF8531U2D

Manufacturer Part Number
PCF8531U2D
Description
34 x 128 pixel matrix driver Single-chip LCD controller and driver
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1. General description
2. Features and benefits
1.
The definition of the abbreviations and acronyms used in this data sheet can be found in
The PCF8531 is a low-power CMOS
matrix graphic displays at multiplex rates of 1:17, 1:26, and 1:34. Furthermore, it can drive
up to 128 icons. All necessary functions for the display are provided in a single chip,
including on-chip generation of V
external components and low power consumption. The PCF8531 is compatible with most
microcontrollers and communicates via a two-line bidirectional I
CMOS compatible.
Remark: The icon mode is used to reduce current consumption. When only icons are
displayed, a much lower operating voltage (V
frequency of the LCD outputs is reduced. In most applications it is possible to use V
V
LCD
PCF8531
34 x 128 pixel matrix driver
Rev. 6 — 16 May 2011
Single-chip LCD controller and driver
34 row and 128 column outputs
Display data RAM 34 × 128 bits
128 icons (last row is used for icons)
Fast-mode I
Software selectable multiplex rates: 1:17, 1:26, and 1:34
Icon mode with multiplex rate 1:2:
On-chip:
No external components required
Software selectable bias configuration
Logic supply voltage range V
Supply voltage range for on-chip voltage generator V
2.5 V to 4.5 V
Display supply voltage range V
.
Featuring reduced current consumption while displaying icons only
Generation of V
Selectable linear temperature compensation
Oscillator requires no external components (external clock also possible)
Generation of intermediate LCD bias voltages
Power-On Reset (POR)
Normal mode: 4 V to 9 V
2
C-bus interface (400 kbit/s)
LCD
(external supply also possible)
DD1
LCD
LCD
to V
1
and the LCD bias voltages, resulting in a minimum of
LCD row and column driver, designed to drive dot
to V
SS1
SS
: 1.8 V to 5.5 V
:
LCD
) can be used and the switching
Section
DD2
19.
and V
2
C-bus. All inputs are
DD3
Product data sheet
to V
SS1
and V
DD
SS2
as
:

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PCF8531U2D Summary of contents

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PCF8531 34 x 128 pixel matrix driver Rev. 6 — 16 May 2011 1. General description The PCF8531 is a low-power CMOS matrix graphic displays at multiplex rates of 1:17, 1:26, and 1:34. Furthermore, it can drive up to 128 ...

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NXP Semiconductors Icon mode Low-power consumption, suitable for battery operated systems CMOS compatible inputs Manufactured in silicon gate CMOS process 3. Applications Telecommunication systems Automotive information systems Point-of-sale terminals Instrumentation 4. Ordering information Table 1. ...

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NXP Semiconductors 5. Block diagram V LCDSENSE Fig 1. PCF8531 Product data sheet R0 to R33 34 V ROW SS1 DRIVERS V SS2 T1 T2 PCF8531 T3 T4 BIAS V VOLTAGE LCDIN GENERATOR V LCD GENERATOR V LCDOUT SCL INPUT ...

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NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 2. PCF8531 Product data sheet R32 C31 C32 . . . . . . C63 C64 . . ...

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NXP Semiconductors Table 2. Pad center Fig 3. Table 3. All x/y coordinates represent the position ...

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NXP Semiconductors Fig 4. Table 4. Pad pad pitch (minimum) bump dimensions wafer thickness (excluding bumps) die size L × W Die size including saw lane of 70 μm. [1] 6.2 Pin description Table 5. All x/y coordinates represent the ...

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NXP Semiconductors Table 5. All x/y coordinates represent the position of the center of each pad with respect to the center (x the chip (see Symbol V LCDOUT V LCDOUT V LCDOUT V LCDOUT V LCDOUT V ...

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NXP Semiconductors Table 5. All x/y coordinates represent the position of the center of each pad with respect to the center (x the chip (see Symbol T4 V SS2 V SS2 V SS2 V SS2 V SS2 ...

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NXP Semiconductors Table 5. All x/y coordinates represent the position of the center of each pad with respect to the center (x the chip (see Symbol R12 R14 R16 R18 R20 R22 R24 R26 R28 R30 R32 ...

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NXP Semiconductors Table 5. All x/y coordinates represent the position of the center of each pad with respect to the center (x the chip (see Symbol C28 C29 C30 C31 C32 C33 C34 C35 C36 C37 C38 ...

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NXP Semiconductors Table 5. All x/y coordinates represent the position of the center of each pad with respect to the center (x the chip (see Symbol C67 C68 C69 C70 C71 C72 C73 C74 C75 C76 C77 ...

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NXP Semiconductors Table 5. All x/y coordinates represent the position of the center of each pad with respect to the center (x the chip (see Symbol C106 C107 C108 C109 C110 C111 C112 C113 C114 C115 C116 ...

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NXP Semiconductors [1] If the on-chip oscillator is used, this input must be connected to V [2] If the internal V [ external V will be damaged. [4] If only the internal Power-On Reset (POR) is used, this ...

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NXP Semiconductors 7. Functional description 7.1 Oscillator The on-chip oscillator provides the clock signal for the display system. No external components are required and the OSC input must be connected to V signal, if used, is connected to this input. ...

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NXP Semiconductors 7.10 Bias voltage generator The bias voltage generator generates four buffered intermediate bias voltages. This block contains the generator for the reference voltages and the four buffers. This block can operate in two voltage ranges: • Normal mode: ...

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NXP Semiconductors 8. LCD waveforms and DDRAM to data mapping The LCD waveforms and the DDRAM to display data mapping are shown in Figure 6 V LCD ROW 0 R0( ...

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NXP Semiconductors V LCD ROW LCD ROW LCD COL 1 ...

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NXP Semiconductors bank 0 bank 1 bank 2 bank 3 bank 4 bank 5 Fig 7. DDRAM to display data mapping 8.1 Addressing Data is written in bytes into the RAM matrix of the PCF8531 as shown in Figure 9 ...

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NXP Semiconductors row. After the very last address (X = 127 and Y = 4), the address pointers wrap around to address ( and Y = 0). The Y address 5 is reserved for icon data and is ...

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NXP Semiconductors 9. Instructions Only two PCF8531 registers, the instruction register and the data register can be directly controlled by the MPU. Before internal operation, control information is stored temporarily in these registers to allow interfacing to various types of ...

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NXP Semiconductors 9.2 Function set 9.2.1 PD When the power-down mode of the LCD driver is active: • All LCD outputs at V • Power-On Reset (POR) detection active, oscillator off • V LCD • ...

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NXP Semiconductors 9.7 Set bias system The bias voltage levels are set in the ratio of R − R − n × R − R − R (see Fig 11. Voltage divider chain Different multiplex rates require different bias settings. ...

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NXP Semiconductors 9.8 LCD bias voltage Table 9. Symbol 9.9 Set V LCD V can be set by software. The voltage at intersection temperature [V LCD be calculated as: V The generated voltage is ...

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NXP Semiconductors Table 10. Symbol T ints a b programming range V LCD VOP[6:0] (programmed) [00h to 7Fh] program range LOW to HIGH. Fig 12. V programming of PCF8531 LCD 9.10 Voltage multiplier control ...

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NXP Semiconductors Fig 13. V Linear temperature compensation is supported in the PCF8531. The temperature coefficient of V Table 13). Table 11. Instruction set 2 Instruction I C-bus command RS R/W H1 and H0 = don’t care (H independent command ...

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NXP Semiconductors Table 11. Instruction set …continued 2 Instruction I C-bus command RS R/W temperature control 0 0 test modes control 0 0 LCD [1] R/W is set to the slave address byte; Co and RS are ...

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NXP Semiconductors Table 13. Bits Temperature coefficient (TC) TC[2:0] Voltage multiplier factor (S) S[1:0] PCF8531 Product data sheet Description of bits H, D and E, TC and S Value 000 001 010 011 100 101 110 111 ...

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NXP Semiconductors 2 10. I C-bus interface 10.1 Characteristics of the I 2 The I C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a Serial DAta line (SDA) and a Serial CLock line ...

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NXP Semiconductors • Multi-master: more than one master can attempt to control the bus at the same time without corrupting the message • Arbitration: procedure to ensure that, if more than one master simultaneously tries to control the bus, only ...

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NXP Semiconductors Fig 17. Acknowledge on the I 2 10.2 I C-bus protocol This driver does not support read. The PCF8531 is a slave receiver. Therefore, it only responds when R the slave address byte. Before any ...

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NXP Semiconductors S Fig 18. Slave address and control byte acknowledge from PCF8531 slave address R/W Co Fig 19. Master transmits to slave receiver; write mode ...

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NXP Semiconductors 11. Internal circuitry PADS DD1 V SS1 PADS PADS SS2 V SS1 V DD1 PADS 73, 74, 50, 51, 52 SCL, SDA, SDACK V SS1 V DD1 ...

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NXP Semiconductors 12. Limiting values Table 14. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol V DD1 V DD2 V DD3 V LCD DD(LCD tot ...

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NXP Semiconductors 13. Static characteristics Table 15. Static characteristics V = 1 DD1 DD2 − ° ° +85 C; unless otherwise specified. amb Symbol Parameter Supplies V LCD ...

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NXP Semiconductors [1] As the programming range for the internally generated V while setting the VOP register and selecting the temperature compensation, that the V under all conditions and including all tolerances. [2] LCD outputs are open circuit, inputs at ...

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NXP Semiconductors V DD RES Fig 21. Reset timing SDA t BUF SCL SDA 2 Fig 22. I C-bus timing PCF8531 Product data sheet t su(RESL) t LOW t HD;STA HD;DAT t SU;STA All information provided in ...

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NXP Semiconductors 400 I DD (μA) 300 200 LCD 7.5 V 100 × voltage multiplier DD1 BS = 100 load. LCD Fig 23. Supply current as ...

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NXP Semiconductors 30 I (μA) I DD(LCD 2 and V DD1 DD2 = 27 ° 100 amb Fig 27. Supply ...

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NXP Semiconductors 15. Application information 15.1 Typical system configuration DD1 DD3 V DD(I2C RES SCL SDA SS1 SS2 Fig 29. Typical system configuration The host microprocessor/microcontroller and the PCF8531 are both connected ...

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NXP Semiconductors Fig 31. Recommended V 15.3 Power supply connections for external V 1 5.5 V Fig 32. Recommended V 15.4 Information about V V LCDIN the bias level buffers. V LCDOUT charge pump. In this ...

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NXP Semiconductors 15.5 Chip-on-glass application Fig 33. Chip-on-glass application The required minimum values for the external capacitors in a chip-on-glass application are: • C ext and V • Higher capacitor values are recommended for ripple reduction. • For COG applications, ...

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NXP Semiconductors 15.6 Programming example Table 17. Programming example for PCF8531 Step Serial bus byte DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 ...

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NXP Semiconductors Table 17. Programming example for PCF8531 Step Serial bus byte DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 ...

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NXP Semiconductors Table 17. Programming example for PCF8531 Step Serial bus byte DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 ...

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NXP Semiconductors 16. Package outline Not applicable. 17. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling Metal-Oxide Semiconductor (MOS) devices ensure that all normal precautions are taken as described in ...

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NXP Semiconductors Fig 35. Tray alignment 19. Abbreviations Table 19. Acronym CDM CMOS COG DDRAM EMC ESD HBM HV IC ITO LCD LSB MM MPU POR RAM RC TC SCL SDA PCF8531 Product data sheet PCF8531 The orientation of the ...

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NXP Semiconductors 20. References [1] AN10170 — Design guidelines for COG modules with NXP monochrome LCD drivers [2] AN10706 — Handling bare die [3] AN10853 — ESD and EMC sensitivity of IC [4] IEC 60134 — Rating systems for electronic ...

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NXP Semiconductors 21. Revision history Table 20. Revision history Document ID Release date PCF8531 v.6 20110516 • Modifications: Specified for product type PCF8531U/2DA/1 PCF8531 v.5 20100810 PCF8531_4 20080613 PCF8531_3 20000211 PCF8531_2 19990810 PCF8531_SDS_1 19990322 PCF8531 Product data sheet Data sheet ...

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NXP Semiconductors 22. Legal information 22.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...

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NXP Semiconductors Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use neither qualified nor tested in accordance with automotive testing ...

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NXP Semiconductors 24. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . ...

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