CAT25080 CATALYST [Catalyst Semiconductor], CAT25080 Datasheet - Page 7

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CAT25080

Manufacturer Part Number
CAT25080
Description
8-Kb and 16-Kb SPI Serial CMOS EEPROM
Manufacturer
CATALYST [Catalyst Semiconductor]
Datasheet

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Byte Write
Once the WEL bit is set, the user may execute a write
sequence, by sending a WRITE instruction, a 16-bit
address and data as shown in Figure 4. Only 10
significant address bits are used by the CAT25080 and
11 by the CAT25160. The rest are don’t care bits, as
shown in Table 5. Internal programming will start after
the low to high CS
cycle, all commands, except for RDSR (Read Status
Register) will be ignored. The RDY
internal write cycle is in progress (RDY
device is ready to accept commands (RDY
Table 5. Byte Address
Figure 4. Byte WRITE Timing
Note: Dashed Line = mode (1, 1) - - - - - -
Figure 5. Page WRITE Timing
Note: Dashed Line = mode (1, 1) - - - - - -
© 2006 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Device
CAT25080
CAT25160
SCK
SCK
SO
CS
SI
SO
CS
SI
* Please check the Byte Address Table (Table 5)
*Please check the Byte Address Table. (Table 5)
¯¯ transition. During an internal write
0
0
0
0
0
0
1
1
0
0
2
HIGH IMPEDANCE
2
Address Significant Bits
0
0
3
¯¯¯¯ bit will indicate if the
OPCODE
3
OPCODE
0
0
4
¯¯¯¯ high), or the the
4
0
A10 - A0
A9 - A0
0
5
¯¯¯¯ low).
5
1
1
6
6
0
0
7
7
A N
A
8
N
8
BYTE ADDRESS*
BYTE ADDRESS*
HIGH IMPEDANCE
7
21
21
Address Don't Care Bits
22
22
Page Write
After sending the first data byte to the CAT25080/160,
the host may continue sending data, up to a total of 32
bytes, according to timing shown in Figure 5. After each
data byte, the lower order address bits are automatically
incremented, while the higher order address bits (page
address) remain unchanged. If during this process the
end of page is exceeded, then loading will “roll over” to
the first byte in the page, thus possibly overwriting
previoualy loaded data. Following completion of the
write cycle, the CAT25080/160 is automatically returned
to the write disable state.
A 0
A
23
23 24-31 32-39
0
A15 - A10
A15 - A11
D7 D6 D5 D4 D3 D2 D1 D0
Data
Byte 1
24
25
Data
Byte 2
DATA IN
26
Data
Byte 3
24+(N-1)x8-1..24+(N-1)x8 24+Nx8-1
DATA IN
27
28
7..1
29
Data Byte N
CAT25080, CAT25160
# Address Clock Pulse
30
0
31
16
16
Doc. No. 1122 Rev. A

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