CAT25080 CATALYST [Catalyst Semiconductor], CAT25080 Datasheet - Page 6

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CAT25080

Manufacturer Part Number
CAT25080
Description
8-Kb and 16-Kb SPI Serial CMOS EEPROM
Manufacturer
CATALYST [Catalyst Semiconductor]
Datasheet

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CAT25080, CAT25160
WRITE OPERATIONS
The CAT25080/160 device powers up into a write
disable state. The device contains a Write Enable Latch
(WEL) which must be set before attempting to write to
the memory array or to the status register. In addition,
the address of the memory location(s) to be written
must be outside the protected area, as defined by BP0
and BP1 bits from the status register.
Write Enable and Write Disable
The internal Write Enable Latch and the corresponding
Status Register WEL bit are set by sending the WREN
instruction to the CAT25080/160. Care must be taken to
Figure 2. WREN Timing
Note: Dashed Line = mode (1, 1) - - - - - -
Figure 3. WRDI Timing
Note: Dashed Line = mode (1, 1) - - - - - -
Doc. No. 1122 Rev. A
SCK
CS
SO
SCK
SI
SO
CS
SI
0
0
0
0
0
0
HIGH IMPEDANCE
0
0
HIGH IMPEDANCE
0
6
0
take the CS
otherwise the Write Enable Latch will not be properly
set. WREN timing is illustrated in Figure 2. The WREN
instruction must be sent prior any WRITE or WRSR
instruction.
The internal write enable latch is reset by sending the
WRDI instruction as shown in Figure 3. Disabling write
operations by resetting the WEL bit, will protect the
device against inadvertent writes.
1
1
1
0
¯¯ input high after the WREN instruction, as
0
0
Characteristics subject to change without notice
© 2006 Catalyst Semiconductor, Inc.

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