VSC8163QR VITESSE [Vitesse Semiconductor Corporation], VSC8163QR Datasheet - Page 4

• Manufacturer Part Number: VSC8163QR
• Description: OC-48 16:1 SONET/SDH MUX with Clock Generator
• Manufacturer: VITESSE [Vitesse Semiconductor Corporation]

Page 4
OC-48 16:1 SONET/SDH
MUX with Clock Generator
High-Speed Data and Clock Output
sion line. The transmission line should be terminated with a 100 resistor at the load between true and comple-
ment outputs (see Figure 6). Connection to a termination voltage is not required. The output driver is back
terminated to 50 on-chip, providing a snubbing of any reflections. If used single-ended, the high-speed output
driver must still be terminated differentially at the load with a 100 resistor between true and complement out-
puts. The high-speed clock output can be powered down for additional power savings. To power down the high-
speed clock, tie the associated pins to V
The high-speed data and clock output drivers consist of a differential pair designed to drive a 50 transmis-
VSC8163
Pre-Driver
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
50
Figure 5: AC Termination of CLK16O+/-, REFCLKO+/-
Tel: (800) VITESSE • FAX: [phone] • Email: [e-mail]
Figure 6: High-Speed Output Termination
VITESSE
SEMICONDUCTOR CORPORATION
V
V
CC
EE
CC
(see Table 3, Package Pin Descriptions, pins 5,6,7).
Z
Z
0
0
Internet: www.vitesse.com
50
50
50
V
CC
-2V
100nF
100nF
Z
0
= 50
Preliminary Data Sheet
downstream
bias point
generated
internally
VSC8163
100
G52216-0, Rev 3.3
01/05/00