VSC8163QR VITESSE [Vitesse Semiconductor Corporation], VSC8163QR Datasheet - Page 3

• Manufacturer Part Number: VSC8163QR
• Description: OC-48 16:1 SONET/SDH MUX with Clock Generator
• Manufacturer: VITESSE [Vitesse Semiconductor Corporation]

G52216-0, Rev 3.3
01/05/01
Preliminary Data Sheet
VSC8163
RESET
PLL locked to reference clock.
Holding RESET “low” for a minimum of five CLK16 cycles, then setting “high” enables FIFO operation.
Holding RESET constantly “low” bypasses the FIFO for transparent mode operation.
VSC8163
VSC8163
Figure 4: Traditional DC Termination of CLK16O+/-, REFCLKO+/-
Figure 3: Split-End DC Termination of CLK16O+/-, REFCLKO+/-
Minimum 5 CLK16 cycles (32ns)
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: [phone] • Email: [e-mail]
VITESSE
SEMICONDUCTOR CORPORATION
Figure 2: Enabling FIFO Operation
Split-end equivalent termination is Z
R1 = 125
Internet: www.vitesse.com
V
CC
R1||R2 = Z
R2 + V
R1+R2
R2 = 83 , Zo=50 , V
EE
0
R1
= V
Z
TERM
Z
Z
Z
o
0
Transparent Mode Operation
o
0
FIFO Mode Operation
TERM
0
V
to V
CC
= V
TERM
V
-2V
CC
EE
V
-2V
CC
50
MUX with Clock Generator
R1
R2
OC-48 16:1 SONET/SDH
50
R1
R2
Page 3