MBM29F400BC-55PF SPANSION [SPANSION], MBM29F400BC-55PF Datasheet

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MBM29F400BC-55PF

Manufacturer Part Number
MBM29F400BC-55PF
Description
FLASH MEMORY CMOS 4M (512K x 8/256K x 16) BIT
Manufacturer
SPANSION [SPANSION]
Datasheet
SPANSION Flash Memory
TM
Data Sheet
September 2003
TM
This document specifies SPANSION
memory products that are now offered by both Advanced Micro Devices and
Fujitsu. Although the document is marked with the name of the company that originally developed the specification,
these products will be offered to customers of both AMD and Fujitsu.
Continuity of Specifications
TM
There is no change to this datasheet as a result of offering the device as a SPANSION
product. Future routine
revisions will occur when appropriate, and changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
AMD and Fujitsu continue to support existing part numbers beginning with "Am" and "MBM". To order these
products, please use only the Ordering Part Numbers listed in this document.
For More Information
TM
Please contact your local AMD or Fujitsu sales office for additional information about SPANSION
memory
solutions.

Related parts for MBM29F400BC-55PF

MBM29F400BC-55PF Summary of contents

Page 1

SPANSION Flash Memory TM Data Sheet September 2003 This document specifies SPANSION Fujitsu. Although the document is marked with the name of the company that originally developed the specification, these products will be offered to customers of both AMD and ...

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... V = 5.0 V ± Ordering Part No 5.0 V ± Max. Address Access Time (ns) Max. CE Access Time (ns) Max. OE Access Time (ns) PACKAGES 48-pin TSOP (1) Marking Side (FPT-48P-M19) 8/256K /MBM29F400BC -55/-70/-90 MBM29F400TC/MBM29F400BC -55 — Marking Side (FPT-48P-M20) DS05-20851-6E 16) BIT -55/-70/-90 supply. 12 not required CC PP (Continued) — ...

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... The MBM29F400TC/BC memory electrically erase the entire chip or all bits within a sector simultaneously via Fowler-Nordhiem tunneling. The bytes/words are programmed one byte/word at a time using the EPROM programming mechanism of hot electron injection. 2 /MBM29F400BC , or the RY/BY output pin. Once the end of a program or erase cycle has been 6 2 ...

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... Resets internal state machine to the read mode • Sector protection Hardware method disables any combination of sectors from write or erase operations • Temporary sector unprotection Temporary sector unprotection via the RESET pin. *: Embedded Erase TM and Embedded Program /MBM29F400BC -55/-70-90 2 PROMs TM are trademarks of Advanced Micro Devices, Inc. -55/-70-90 3 ...

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... N.C. 13 MBM29F400TC/MBM29F400BC RESET 12 Reverse Bend WE 11 N. FPT-48P-M20 4 /MBM29F400BC TSOP ( BYTE ...

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... Pin name Address Inputs Data Inputs/Outputs Chip Enable OE Output Enable WE Write Enable RY/BY Ready-Busy Output RESET Hardware Reset Pin/Temporary Sector Unprotection BYTE Selects 8-bit or 16-bit mode N.C. No Internal Connection V Device Ground SS V Device Power Supply CC /MBM29F400BC -55/-70-90 Function -55/-70-90 5 ...

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... State Control BYTE RESET Command Register CE OE Low V Detector LOGIC SYMBOL 6 /MBM29F400BC RY/BY Erase Voltage Generator Program Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer for Address Program/Erase Latch X-Decoder ...

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... Manufacturer and device codes may also be accessed via a command register write sequence. Refer to “MBM29F400TC/BC Command Definitions” in DEVICE BUS OPERATION Refer to the section on Sector Protection can /MBM29F400BC -55/-70- ...

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... Word Mode: 555h or 2AAh to addresses A Byte Mode: AAAh or 555h to addresses A Both Read/Reset commands are functionally equivalent, resetting the device to the read mode. Command combinations not described in Command Definitions table are illegal. 8 /MBM29F400BC MBM29F400TC/BC Command Definitions Second Third Bus Bus Write Cycle Write Cycle — ...

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... Outputs 01h at protected sector addresses and outputs 00h at unprotected sector addresses. Type Code DQ Manufacturer’s Code 04h A (B) 23h A MBM29F400TC (W) 2223h Device Code (B) ABh A MBM29F400BC (W) 22ABh Sector Protection 01h A (B): Byte mode (W): Word mode Hi-Z : High-Z /MBM29F400BC -55/-70- ...

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... MBM29F400BC Sector Architecture -55/-70- 16) 7FFFFh 3FFFFh 64K byte 6FFFFh 37FFFh 64K byte 5FFFFh 2FFFFh 64K byte 4FFFFh 27FFFh 64K byte 3FFFFh 1FFFFh 64K byte ...

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... SA2 0 1 SA3 0 1 SA4 1 0 SA5 1 0 SA6 1 1 SA7 1 1 SA8 1 1 SA9 1 1 SA10 1 1 Sector Address Table (MBM29F400BC) Sector Address SA0 0 0 SA1 0 0 SA2 0 0 SA3 0 0 SA4 0 0 SA5 0 1 SA6 0 1 SA7 ...

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... IL = 23h and MBM29F400BC = ABh for 8 mode; MBM29F400TC = 2223h and MBM29F400BC = 22ABh for 16 mode). These two bytes/words are given in “MBM29F400TC/BC Sector Protection Verify Autoselect Codes” and “Expanded Autoselect Code Table” in DEVICE BUS OPERATION. All identifiers for manufacturer and device ...

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... sector to be protected. “Sector Address Table (MBM29F400TC)” and “Sector Address Table (MBM29F400BC)” in FLEXIBLE SECTOR ERASE ARCHITECTURE define the sector address for each of the eleven (11) individual sectors. Programming of the protection circuitry begins on the falling edge of the WE pulse and is terminated with the rising edge of the same. Sector addresses must be held constant during the WE pulse. Refer to “ ...

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... Following the command write, a read cycle from address XX00h retrieves the manufacture code of 04h. A read cycle from address XX01h for 16 (XX02h for 8) returns the device code (MBM29F400TC = 23h and MBM29F400BC = ABh for 8 mode; MBM29F400TC = 2223h and MBM29F400BC = 22ABh for 16 mode). (See “MBM29F400TC/BC Sector Protection Verify Autoselect Codes” and “Expanded Autoselect Code Table” ...

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... The automatic sector erase begins after the 50 µs time out from the rising edge of the WE pulse for the last sector erase command pulse and terminates when the data on DQ time the device returns to the read mode. Data polling must be performed at an address within any of the sectors being erased. /MBM29F400BC -55/-70-90 to determine if the sector erase timer window is still open, see section 3 is “ ...

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... To resume the operation of Sector Erase, the Resume command (30h) should be written. Any further writes of the Resume command at this point will be ignored. Another Erase Suspend command can be written after the chip has resumed erasing. 16 /MBM29F400BC -55/-70-90 will stop toggling. The user must use the address of the 6 and DQ to determine if the erase operation has been suspended ...

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... The Data Polling feature is only active during the Embedded Programming Algorithm, Embedded Erase Algorithm or sector erase time-out (See “Hardware Sequence Flags”). See “AC Waveforms for Data Polling during Embedded Algorithm Operations” in TIMING DIAGRAM for the Data Polling timing specifications and diagrams. /MBM29F400BC -55/-70-90 Hardware Sequence Flags DQ ...

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... second status check, the command may not have been accepted. Refer to “Hardware Sequence Flags” : Hardware Sequence Flags. 18 /MBM29F400BC -55/-70-90 to toggle. In addition, an Erase Suspend/Resume command will 6 never stops toggling. Once the device has exceeded timing limits, the ...

Page 20

... RESET pulse. Refer to “RY/BY Timing Diagram during Program/Erase Operations” and “RESET/RY/BY Timing Diagram” in TIMING DIAGRAM for a detailed timing diagram. Since this is an open-drain output, several RY/BY pins can be tied together in parallel with a pull-up resistor to V /MBM29F400BC -55/-70-90 to toggle during the Embedded Erase Algorithm. If the 2 bit ...

Page 21

... logical one. Power-Up Write Inhibit Power-up of the device with The internal state machine is automatically reset to the read mode on power-up. 20 /MBM29F400BC -55/-70-90 ) for at least 500 ns in order to properly reset the internal state machine bits are tri-stated. However, the command bus cycle is always ...

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... No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. /MBM29F400BC -55/-70-90 Symbol Min Tstg – ...

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... MBM29F400TC MAXIMUM OVERSHOOT/MAXIMUM UNDERSHOOT +0.8 V –0.5 V – +2.0 V +14.0 V +13 +0 Note: This waveform is applied for A 22 /MBM29F400BC -55/-70- Maximum Undershoot Waveform Maximum Overshoot Waveform OE, and RESET. 9 Maximum Overshoot Waveform -55/-70- ...

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... DC operating current and the frequency dependent component ( MHz). The frequency component typically is 2 mA/MHz, with active while Embedded Algorithm (program or erase progress Applicable to sector protection function not exceed /MBM29F400BC -55/-70-90 Symbol Test Conditions ...

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... Input pulse levels: 0 3.0 V Timing measurement reference level Input: 1.5 V Output: 1.5 V Device Under Test Notes including jig capacitance (MBM29F400TC/BC-55 100 pF including jig capacitance (MBM29F400TC/BC-70/90 /MBM29F400BC -55/-70-90 Symbol Test Setup JEDEC Min Max Min Max Min Max Standard t t — AVAV ...

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... Setup Time CC RiseTime Voltage Transition Time* 2 Write Pulse Width Setup Time to WE Active Setup Time to WE Active* 2 Recover Time from RY/BY RESET Pulse Width RESET Hold Time Before Read /MBM29F400BC -55/-70-90 Symbol -55 JEDEC Standard Min Typ Max Min AVAV ...

Page 27

... BYTE Switching Low to Output High-Z BYTE Switching High to Output Active Program/Erase Valid to RY/BY Delay Delay Time from Embedded Output Enable *1 : This does not include the preprogramming time These timing is for Sector Protection operation. 26 /MBM29F400BC -55/-70-90 Symbol -55 JEDEC Standard Min Typ Max Min — ...

Page 28

... MBM29F400TC TIMING DIAGRAM • Key to Switching Waveforms WAVEFORM Address OEH WE High-Z Outputs AC Waveforms for Read Operations /MBM29F400BC -55/-70-90 INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from from May Will Be Change Changing from from “H” or “L” ...

Page 29

... D is the output of the data written to the device. OUT Figure indicates last two bus cycles out of four bus cycle sequence. These waveforms are for the AC Waveforms for Alternate WE Controlled Program Operations 28 /MBM29F400BC -55/-70-90 Data Polling ...

Page 30

... D is the output of the data written to the device. OUT Figure indicates last two bus cycles out of four bus cycle sequence. These waveforms are for the AC Waveforms for Alternate CE Controlled Program Operations /MBM29F400BC Data Polling WHWH1 ...

Page 31

... Data VCS Notes the sector address for Sector Erase. Addresses = 555h (Word), AAAh (Byte) for Chip Erase. These waveforms are for the AC Waveforms Chip/Sector Erase Operations 30 /MBM29F400BC -55/-70- 555h 2AAh 555h WPH t DH ...

Page 32

... WE t OES OE Data Toggle stops toggling (The device has completed the Embedded operation Waveforms for Toggle Bit I during Embedded Algorithm Operations /MBM29F400BC Valid Data t WHWH1 Output Flag ...

Page 33

... MBM29F400TC CE WE RY/BY RY/BY Timing Diagram during Program/Erase Operations WE RESET RY/BY 32 /MBM29F400BC -55/-70-90 Rising edge of the last WE signal READY RESET/RY/BY Timing Diagram -55/-70-90 Entire programming or erase operations t BUSY t RB ...

Page 34

... Timing Diagram for Word Mode Configuration CE BYTE t ELFL Timing Diagram for Byte Mode Configuration BYTE BYTE Timing Diagram for Write Operations /MBM29F400BC -55/-70-90 Data Output Data Output ( ( FHQV Data Output ...

Page 35

... VLHT WE CE Data t VLHT V CC SAX = Sector Address for initial sector SAY = Sector Address for next sector Note byte mode Waveforms for Sector Protection Timing Diagram 34 /MBM29F400BC -55/-70- WPP OESP VLHT t CSP -55/-70-90 SAY t VLHT 01h t OE ...

Page 36

... Suspend Erasing WE Erase Erase Suspend Read Toggle DQ and with read from the erase-suspended sector. 2 /MBM29F400BC -55/-70-90 t Program or Erase Command Sequence VLHT Unprotection period Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program DQ vs -55/-70-90 t VLHT ...

Page 37

... MBM29F400TC FLOW CHART EMBEDDED ALGORITHMS Increment Address *: The sequence is applied for The addresses differ from 36 /MBM29F400BC -55/-70-90 Start Write Program Command Sequence (See Below) Data Polling Device No Last Address ? Yes Programming Completed Program Command Sequence* (Address/Command): 555h/AAh 2AAh/55h 555h/A0h Program Address/Program Data 16 mode ...

Page 38

... Chip Erase Command Sequence* (Address/Command): 555h/AAh 2AAh/55h 555h/80h 555h/AAh 2AAh/55h 555h/10h *: The sequence is applied for The addresses differ from 8 mode. /MBM29F400BC -55/-70-90 Start Write Erase Command Sequece (See Below) Data Polling or Toggle Bit Successfully Completed Erasure Completed Individual Sector/Multiple Sector* Erase Command Sequence ...

Page 39

... MBM29F400TC Note rechecked even /MBM29F400BC -55/-70-90 Start Read Byte ( Addr Yes DQ = Data Yes Read Byte ( Addr Yes DQ = Data Pass Fail = “1” because DQ may change simultaneously with Data Polling Algorithm ...

Page 40

... Addr Read DQ Addr. Read DQ Addr. Program/Erase Operation Not Complete.Write Reset Command *1 : Read toggle bit twice to determine whether it is toggling Recheck toggle bit because it may stop toggling as DQ /MBM29F400BC Start VA Bank address being executed Embedded Algorithm ...

Page 41

... MBM29F400TC Increment PLSCNT PLSCNT = 25? Remove V Write Reset Command Device Failed *: byte mode /MBM29F400BC -55/-70-90 Start Setup Sector Addr 16, 15 PLSCNT = Activate WE Pulse Time out 100 should remain V 9 Read from Sector (Addr ...

Page 42

... MBM29F400TC -55/-70-90 *1: All protected sectors unprotected. *2: All previously protected sectors are protected once again. Temporary Sector Unprotection Algorithm /MBM29F400BC Start RESET = Perform Erase or Program Operations RESET = V IH Temporary Sector Unprotection Completed* 2 -55/-70-90 41 ...

Page 43

... SOP PIN CAPACITANCE Parameter Input Capacitance Output Capacitance Control Pin Capacitance Notes : Test conditions T = +25° 1.0 MHz pin capacitance is stipulated by output capacitance /MBM29F400BC -55/-70-90 Limits Min Typ Max — — 16 200 — 8 150 — 4.2 10 — ...

Page 44

... Fujitsu standard products are available in several packages. The order number is formed by a combination of: MBM29F400 T C -55 DEVICE NUMBER/DESCRIPTION MBM29F400 4Mega-bit (512K 5.0 V-only Read, Write, and Erase /MBM29F400BC -55/-70-90 PFTN PACKAGE TYPE PFTN = 48-Pin Thin Small Outline Package (TSOP (1)) Standard Pinout PFTR = 48-Pin Thin Small Outline Package (TSOP (1)) Reverse Pinout PF = ...

Page 45

... FUJITSU LIMITED F48029S-c-6 /MBM29F400BC -55/-70-90 Note Values do not include resin protrusion. Resin protrusion and gate protrusion are +0.15(.006)Max(each side). Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. ...

Page 46

... FUJITSU LIMITED F48030S-c-6-7 C /MBM29F400BC -55/-70-90 Note Values do not include resin protrusion. Resin protrusion and gate protrusion are +0.15(.006)Max(each side). Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 48 Details of " ...

Page 47

... FUJITSU LIMITED F44023S-c-6 /MBM29F400BC -55/-70-90 Note These dimensions include resin protrusion. Note These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder. ...

Page 48

... If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan. F0404 FUJITSU LIMITED Printed in Japan /MBM29F400BC -55/-70-90 ...

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