MC68HC11E Motorola, MC68HC11E Datasheet - Page 98

• Manufacturer Part Number: MC68HC11E
• Description: Microcontrollers
• Manufacturer: Motorola

Resets and Interrupts
5.5 Interrupts
Data Sheet
98
The MCU has 18 interrupt vectors that support 22 interrupt sources. The 15
maskable interrupts are generated by on-chip peripheral systems. These interrupts
are recognized when the global interrupt mask bit (I) in the condition code register
(CCR) is clear. The three non-maskable interrupt sources are illegal opcode trap,
software interrupt, and XIRQ pin. Refer to
sources and vector assignments for each source.
For some interrupt sources, such as the SCI interrupts, the flags are automatically
cleared during the normal course of responding to the interrupt requests. For
example, the RDRF flag in the SCI system is cleared by the automatic clearing
mechanism consisting of a read of the SCI status register while RDRF is set,
followed by a read of the SCI data register. The normal response to an RDRF
interrupt request would be to read the SCI status register to check for receive
errors, then to read the received data from the SCI data register. These steps
satisfy the automatic clearing mechanism without requiring special instructions.
Freescale Semiconductor, Inc.
For More Information On This Product,
PSEL[3:0]
Table 5-3. Highest Priority Interrupt Selection
Go to: www.freescale.com
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
Resets and Interrupts
Timer overflow
Pulse accumulator overflow
Pulse accumulator input edge
SPI serial transfer complete
SCI serial system
Reserved (default to IRQ)
IRQ (external pin or parallel I/O)
Real-time interrupt
Timer input capture 1
Timer input capture 2
Timer input capture 3
Timer output compare 1
Timer output compare 2
Timer output compare 3
Timer output compare 4
Timer input capture 4/output compare 5
Interrupt Source Promoted
Table
5-4, which shows the interrupt
M68HC11E Family — Rev. 5
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