EPF10K10 ETC, EPF10K10 Datasheet - Page 37

• Manufacturer Part Number: EPF10K10
• Description: EMBEDDED PROGRAMMABLE LOGIC FAMILY
• Manufacturer: ETC

Altera Corporation
Output
Configuration
f
Figure 17. Enabling ClockLock & ClockBoost in the Same Design
To use both the ClockLock and ClockBoost circuits in the same design,
designers must use Revision C EPF10K100GC503-3DX devices and
MAX+PLUS II software versions 7.2 or higher. The die revision is
indicated by the third digit of the nine-digit code on the top side of the
device.
For more information on using the ClockLock and ClockBoost features,
see the Clock Management with ClockLock & ClockBoost Features White Paper,
which is available from Altera Literature Services.
This section discusses the peripheral component interconnect (PCI)
pull-up clamping diode option, slew-rate control, open-drain output
option, MultiVolt I/O interface, and power sequencing for FLEX 10K
devices. The PCI pull-up clamping diode, slew-rate control, and
open-drain output options are controlled pin-by-pin via MAX+PLUS II
logic options. The MultiVolt I/O interface is controlled by connecting
V
MAX+PLUS II software via the Global Project Device Options dialog
box (Assign menu).
PCI Clamping Diodes
The EPF10K10A and EPF10K30A devices have a pull-up clamping diode
on every I/O, dedicated input, and dedicated clock pin. PCI clamping
diodes clamp the transient overshoot caused by reflected waves to the
V
can also be used to limit overshoot in other systems.
CCIO
CCIO
to a different voltage than V
value and are required for 3.3-V PCI compliance. Clamping diodes
gclk1
FLEX 10K Embedded Programmable Logic Family Data Sheet
CLKLOCK
CLKLOCK
CLOCKBOOST=1
INPUT_FREQUENCY=50
CLOCKBOOST=2
INPUT_FREQUENCY=50
a
b
CCINT
. Its effect can be simulated in the
D
D
Q
Q
aout
bout
37