M48T59 ST Microelectronics, M48T59 Datasheet - Page 13

• Manufacturer Part Number: M48T59
• Description: 64 Kbit 8Kb x8 TIMEKEEPER SRAM
• Manufacturer: ST Microelectronics

Note: User must transition address (or toggle chip
enable) to see Flag bit change.
When the clock information matches the alarm
clock settings based on the match criteria defined
by RPT1-RPT4, AF (Alarm Flag) is set. If AFE
(Alarm Flag Enable) is also set, the alarm condi-
tion activates the IRQ/FT pin. To disable alarm,
write ‘0’ to the Alarm Date register and RPT1-4.
The alarm flag and the IRQ/FT output are cleared
by a read to the Flags register.
The IRQ/FT pin can also be activated in the bat-
tery back-up mode. The IRQ/FT will go low if an
alarm occurs and both ABE (Alarm in Battery
Back-up Mode Enable) and AFE are set. The ABE
and AFE bits are reset during power-up, therefore
an alarm generated during power-up will only set
AF. The user can read the Flag Register at system
boot-up to determine if an alarm was generated
while the M48T59 was in the deselect mode during
power-up. Figure 12 illustrates the back-up mode
alarm timing.
Figure 12. Back-up Mode Alarm Waveforms
V CC
V PFD (max)
V PFD (min)
V SO
ABE, AFE bit in Interrupt Register
AF bit in Flags Register
IRQ/FT
HIGH-Z
WATCHDOG TIMER
The watchdog timer can be used to detect an out-
of-control microprocessor. The user programs the
watchdog timer by setting the desired amount of
time-out into the eight bit Watchdog Register (Ad-
dress 1FF7h). The five bits (BMB4-BMB0) store a
binary multiplier and the two lower order bits (RB1-
RB0) select the resolution, where 00 = 1/16 sec-
ond, 01 = 1/4 second, 10 = 1 second, and 11 = 4
seconds. The amount of time-out is then deter-
mined to be the multiplication of the five bit multi-
plier value with the resolution. (For example:
writing 00001110 in the Watchdog Register = 3 x 1
or 3 seconds).
Note: Accuracy of timer is within ± the selected
resolution.
If the processor does not reset the timer within the
specified period, the M48T59 sets the WDF
(Watchdog Flag) and generates a watchdog inter-
rupt or a microprocessor reset.
WDF is reset by reading the Flags Register (Ad-
dress 1FFOh).
M48T59, M48T59Y, M48T59V
tREC
HIGH-Z
AI03254B
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