LTC3734 LINER [Linear Technology], LTC3734 Datasheet - Page 7

• Manufacturer Part Number: LTC3734
• Description: Single-Phase, High Efficiency DC/DC Controller for Intel Mobile CPUs
• Manufacturer: LINER [Linear Technology]

PI FU CTIO S
V
Amplifier.
OAOUT (Pin 3): Output of the Internal Operational
Amplifier.
STP_CPUB (Pin 4): Deep Sleep State Input. When the
signal to this pin is low, the voltage regulator enters deep
sleep state and its output voltage is a certain percentage
lower than the VID commands. This offset percentage is
set by the resistor connected to the RDPSLP pin. When the
signal to this pin is high, the voltage regulator exits deep
sleep state.
SGND (Pin 5): Signal Ground. All small-signal compo-
nents and compensation components should connect to
this ground which, in turn, connects to PGND at one point.
SENSE
Comparator. The I
tween SENSE
R
SENSE
Comparator.
RDPRSLP (Pin 8): Deeper Sleep State Resistor Pin. Con-
nect a resistor from this pin to V
conjunction with the RDPSLP resistor sets the output
voltage of the regulator in deeper sleep state.
RDPSLP (Pin 9): Deep Sleep Resistor Pin. Connect a
resistor from this pin to V
percentage offset of output voltage in deep sleep state.
OA
SENSE
U
+
, V
+
–
OA
set the current trip threshold.
(Pin 6): The (+) Input to the Differential Current
(Pin 7): The (–) Input to the Differential Current
–
U
(Pins 1, 2): Inputs to the Internal Operational
–
and SENSE
TH
U
pin voltage and built-in offsets be-
+
OA
pins in conjunction with
+
. This resistor sets the
OA
+
. This resistor in
RUN/SS (Pin 10): Combination of Soft-Start, Run Control
Input and Short-Circuit Detection Timer. A capacitor to
ground at this pin sets the ramp time to full current output.
Forcing this pin below 1V causes the IC to shut down all
internal circuitry. All functions are disabled in shutdown.
I
lator Compensation Point. The current comparator’s thresh-
old increases with this control voltage. The normal voltage
range of this pin is from 0V to 2.4V
RBOOT (Pin 12): Boot-Up Resistor Pin. Connect a resistor
from this pin to V
during the initial boot-up.
VID0–VID5 (Pins 13, 14, 15, 17, 18, 19): VID Control
Logic Input Pins.
NC (Pin 16): Not Connected.
PGND (Pin 20): Driver Power Ground. Connect to sources
of bottom N-channel MOSFETs and the (–) terminals of C
BG (Pin 21): High Current Gate Drive for Bottom N-Channel
MOSFETs. Voltage swing at this pin is from ground to
PV
PV
are powered from this voltage source. Decouple to PGND
with a minimum of 4.7μF X5R/X7R ceramic capacitor
placed directly adjacent to the IC.
TH
CC
CC
(Pin 11): Error Amplifier Output and Switching Regu-
.
(Pin 22): Power Supply Pin. The on chip gate drivers
OA
+
. This resistor sets the output voltage
LTC3734
7
3734f
IN
.