LTC3734 LINER [Linear Technology], LTC3734 Datasheet - Page 16

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LTC3734

Manufacturer Part Number
LTC3734
Description
Single-Phase, High Efficiency DC/DC Controller for Intel Mobile CPUs
Manufacturer
LINER [Linear Technology]
Datasheet

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APPLICATIO S I FOR ATIO
LTC3734
VID Output Voltage Programming
After 27μs ~ 71μs t
regulator is digitally programmed as defined in Table 1
using the VID0 to VID5 logic input pins. The VID logic
inputs program a precision, 0.25% internal feedback
resistive divider. The LTC3734 has an output voltage
range of 0.700V to 1.708V in 16mV steps.
Refering to the Functional Diagram, there is a resistor,
R
by the six VID input pins. Another internal resistor, 5.33k
(R
voltage is thus set by the ratio of (R
Each VID digital pin is a high impedance input. Therefore
they must be actively pulled high or pulled low. The logic
low threshold of the VID pins is 0.3V; the logic high
threshold is 0.7V.
Soft-Start/Run Function
The RUN/SS pin provides three functions: 1) run/shut-
down, 2) soft-start and 3) an optional short-circuit latchoff
timer. Soft-start reduces the input power source’s surge
currents by gradually increasing the controller’s current
limit. The latchoff timer prevents very short, extreme load
transients from tripping the overcurrent latch. A small pull-
up current (>5μA) supplied to the RUN/SS pin will prevent
the overcurrent latch from operating. The following para-
graph describes how the functions operate.
An internal 1.5μA current source charges up the soft-start
capacitor, C
1.5V, the controller is permitted to start operating. As the
voltage on RUN/SS increases from 1.5V to 3.0V, the
internal current limit is increased from 25mV/R
72mV/R
eliminating the starting surge current required from the
input power supply. If RUN/SS has been pulled all the way
to ground there is a delay before starting of approximately:
The time for the output current to ramp up is then:
16
VID
ATTEN
t
t
IRAMP
DELAY
, from V
), completes the resistive divider. The output
SENSE
=
=
SS
FB
1 5
3
1 5
. The output current thus ramps up slowly,
.
V
. When the voltage on RUN/SS reaches
1 5
.
to ground. The value of R
μ
.
V
A
μ
1 5
U
C
.
A
BOOT
SS
V
C
=
delay, the output voltage of the
SS
U
(
1
s F C
=
/
μ
(
1
s F C
)
/
μ
W
SS
VID
)
+ 5.33k) to R
SS
VID
is controlled
U
SENSE
VID
to
.
By pulling the RUN/SS pin below 1V the LTC3734 is put
into low current shutdown (I
can be driven directly from logic as shown in Figure 3.
Diode D1 in Figure 3 reduces the start delay but allows
C
The RUN/SS pin has an internal 6V zener clamp (see
Functional Diagram).
Start-Up Sequence (Refer to the Functional Diagram)
After soft-start, the output voltage of the regulator settles
at a voltage level equal to V
By using different R5 resistors, V
After the output voltage enters the ±10% regulation win-
dow centered at V
tor issues a logic high signal. Refer to the timing diagram
in Figure 4. This signal then enters a logic AND gate, with
MCH_PG being the other input, and the output of the gate
is PG shown in Figure 4. This composite PG signal is then
delayed by t
As soon as MD is asserted, the output voltage changes
from V
six VID bits. In the LTC3734, the time t
switching cycles:
If f
If f
SS
S
S
V
t
BOOT
to ramp up slowly providing the soft-start function.
BOOT
is set at 210kHz, t
is set at 550kHz, t
3.3V OR 5V
*OPTIONAL TO DEFEAT OVERCURRENT LATCHOFF
BOOT
= 15
=
to V
BOOT
0 6
.
Figure 3. RUN/SS Pin Interfacing
D1
f
1
V
VID
S
PV
amount of time and then becomes MD.
BOOT
, a voltage level totally controlled by the
R
CC
R
R
2
5
SS
, the internal power good compara-
BOOT
BOOT
*
RUN/SS
(
(
R
R
3
1
+
BOOT
+
= 71μs
= 27μs
C
Q
SS
R
R
< 100μA). The RUN/SS pin
2
5
BOOT
)
.
)
can be programmed.
BOOT
is set to be 15
RUN/SS
3734 F03
C
SS
3734f

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