C501G-1E SIEMENS [Siemens Semiconductor Group], C501G-1E Datasheet - Page 82

• Manufacturer Part Number: C501G-1E
• Description: 8-Bit Single-Chip Microcontroller
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

7.1.2 Interrupt Request / Control Flags
The external interrupts 0 and 1 (INT0 and INT1) can each be either level-activated or negative
transition-activated, depending on bits IT0 and IT1 in register TCON. The flags that actually
generate these interrupts are bits IE0 and lE1 in TCON. When an external interrupt is generated, the
flag that generated this interrupt is cleared by the hardware when the service routine is vectored too,
but only if the interrupt was transition-activated. lf the interrupt was level-activated, then the
requesting external source directly controls the request flag, rather than the on-chip hardware.
The timer 0 and timer 1 interrupts are generated by TF0 and TF1 in register TCON, which are set
by a rollover in their respective timer/counter registers. When a timer interrupt is generated, the flag
that generated it is cleared by the on-chip hardware when the service routine is vectored too.
Special Function Register TCON (Address 88 H )
Bit
TF1
TF0
IE1
IT1
IE0
IT0
Semiconductor Group
Bit No.
88 H
The shaded bits are not used for interrupt control.
Function
Timer 1 overflow flag
Set by hardware on timer/counter 1 overflow. Cleared by hardware when
processor vectors to interrupt routine.
Timer 0 overflow flag
Set by hardware on timer/counter 0 overflow. Cleared by hardware when
processor vectors to interrupt routine.
External interrupt 1 request flag
Set by hardware when external interrupt 1 edge is detected. Cleared by hardware
when processor vectors to interrupt routine.
External interrupt 1 level/edge trigger control flag
If IT1 = 0, low level triggered external interrupt 1 is selected.
If IT1 = 1, falling edge triggered external interrupt 1 is selected.
External interrupt 0 request flag
Set by hardware when external interrupt 0 edge is detected. Cleared by hardware
when processor vectors to interrupt routine.
External interrupt 0 level/edge trigger control flag
If IT0 = 0, low level triggered external interrupt 0 is selected.
If IT0 = 1, falling edge triggered external interrupt 0 is selected.
MSB
TF1
8F
H
TR1
8E
H
TF0
8D
H
TR0
8C
H
7-4
IE1
8B
H
IT1
8A
H
IE0
89
H
LSB
IT0
Interrupt System
88
H
Reset Value : 00 H
TCON
C501