ADN2526ACPZ-R2 AD [Analog Devices], ADN2526ACPZ-R2 Datasheet - Page 14

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ADN2526ACPZ-R2

Manufacturer Part Number
ADN2526ACPZ-R2
Description
11.3 Gbps Active Back-Termination, Differential Laser Diode Driver
Manufacturer
AD [Analog Devices]
Datasheet
ADN2526
APPLICATIONS INFORMATION
TYPICAL APPLICATION CIRCUIT
Figure 34 shows the typical application circuit for the ADN2526.
The dc voltages applied to the BSET and MSET pins control the
bias and modulation currents. The bias current can be monitored
as a voltage drop across the 1 kΩ resistor connected between
the IBMON pin and GND. The ALS pin allows the user to turn
on or turn off the bias and modulation currents, depending on
the logic level applied to the pin. The data signal source must be
connected to the DATAP and DATAN pins of the ADN2526
using 50 Ω transmission lines. The modulation current outputs,
IMODP and IMODN, must be connected to the load (TOSA)
using 50 Ω differential (25 Ω single-ended) transmission lines.
It is recommended that the components shown in Table 7 be
used between the ADN2526 and the TOSA for an example ac
coupling circuit. For up-to-date component recommendations,
contact your local Analog Devices, Inc., sales representative.
Working with a TOSA laser sample, the circuit in Figure 34
delivers optical performance shown in Figure 15 and Figure 16.
For additional applications information and optical eye perfor-
mance of other laser samples, contact your local Analog Devices
sales representative.
Table 7. Recommended Components for AC-Coupling
Component
R1, R2
R3, R4
C3, C4
L2, L3
L6, L7
L1, L4, L5, L8
DATAP
DATAN
MSET
BSET
3.3V
Value
36 Ω
200 Ω
100 nF
20 nH
0402 size ferrite
10 μH
Z
Z
0
0
= 50Ω
= 50Ω
VCC
VCC
C1
C2
GND
C7
200µF
VCC
DATAP
DATAN
VCC
VCC
GND
MSET CPA
0603 size resistor
0603 size resistor
0603 size inductor, Murata LQM21FN100M70L
BSET IBMON IBIAS VEE
Description
0603 size capacitor, Phycomp 223878615649
0402 size inductor, Murata LQW15AN20NJ0
Murata BLM15HG102SN1
TP1
Figure 34. Typical Application Circuit
ADN2526
CPA
R5
1kΩ
ALS
ALS
Rev. A | Page 14 of 16
VEE
IMODN
IMODP
VCC
VCC
10nF
10nF
GND
C5
C6
GND
VCC
VCC
LAYOUT GUIDELINES
Due to the high frequencies at which the ADN2526 operates,
care should be taken when designing the PCB layout to obtain
optimum performance. Well controlled transmission line
impedance must be used for the high speed signal paths. The
length of the transmission lines must be kept to a minimum to
reduce losses and pattern-dependent jitter. The PCB layout
must be symmetrical, on both the DATAP and DATAN inputs
and the IMODP and IMODN outputs, to ensure a balance
between the differential signals. All VCC and VEE pins must be
connected to solid copper planes by using low inductance
connections. When the connections are made through vias,
multiple vias should be used in parallel to reduce the parasitic
inductance. Each VEE pin must be locally decoupled with high
quality capacitors. If proper decoupling cannot be achieved
using a single capacitor, the user can use multiple capacitors in
parallel for each VEE pin. A 20 μF tantalum capacitor must be
used as a general decoupling capacitor for the entire module. For
guidelines on the surface-mount assembly of the ADN2526, see
the Amkor Technology® Application Notes for Surface Mount
Assembly of Amkor’s Micro LeadFrame® (MLF®) Packages.
Z
Z
0
0
VCC
VCC
= 25Ω
= 25Ω
GND
GND
L1
L2
L3
L4
VCC
VCC
R1
R2
C4
C3
L8
L7
L6
L5
VCC
Z
Z
0
0
= 25Ω
= 25Ω
R4
R3
TOSA

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