ADN2526ACPZ-R2 AD [Analog Devices], ADN2526ACPZ-R2 Datasheet - Page 13

• Manufacturer Part Number: ADN2526ACPZ-R2
• Description: 11.3 Gbps Active Back-Termination, Differential Laser Diode Driver
• Manufacturer: AD [Analog Devices]

CROSSPOINT ADJUSTMENT
The optical eye cross point is adjustable between 35% and 65%
using the cross point adjust (CPA) control input. The equivalent
circuit for the CPA pin is shown in Figure 31. In a default CPA
setting, leave CPA unconnected (maintain pin-to-pin compatibil-
ity with the ADN2525). The internal bias circuit presents about
1.9 V at the CPA pin and the eye cross point is set to 50%. To set
the cross point at various points, apply an external voltage to the
CPA pin.
POWER SEQUENCE
To ensure reliable operation, the recommended power-up
sequence is: the supply rail to ADN2526 first, then the BSET
pin, followed by the MSET pin, and, finally, the CPA pin.
To turn off the ADN2526, the operation is reversed: shut down
CPA first, then MSET, followed by BSET, and, last, the supply rail.
POWER CONSUMPTION
The power dissipated by the ADN2526 is given by
where:
VCC is the power supply voltage.
V
I
and IMODN, which are sank by the ADN2526 when V
V
V
IBIAS is the bias current sank by the ADN2526.
Considering V
from V
To ensure long-term reliable operation, the junction tempera-
ture of the ADN2526 must not exceed 125°C, as specified in
Table 2. For improved heat dissipation, the SFP+ module case
can work as a heat sink, as shown in Figure 32. A compact
optical module is a complex thermal environment, and
calculations of device junction temperature using the package
SUPPLY
MSET
IBIAS
MSET
P
P
is the average voltage presented on the IBIAS pin.
is the voltage applied to the MSET pin.
= 0 V, expressed in amps (see Table 1).
is the sum of the currents that flow into VCC, IMODP,
BSET
=
=
VCC
VCC
7kΩ
to IBIAS, the dissipated power becomes
VCC
×
×
BSET
Figure 31. Equivalent Circuit for CPA Pin
⎛
⎜
⎝
⎛
⎜
⎝
V
V
/IBIAS = 10 mV/mA as the conversion factor
13.5
13
MSET
MSET
CPA
5 .
7kΩ
+
+
I
I
SUPPLY
SUPPLY
⎞
⎟
⎠
⎞
⎟
⎠
+
+
V
V
IBIAS
10
BSET
7kΩ
×
×
IBIAS
V
IBIAS
BSET
=
Rev. A | Page 13 of 16
junction-to-ambient thermal resistance (θ
accurate results.
PACKAGE
The parameters in Table 6 can be used to estimate the IC
junction temperature.
Table 6. Definitions
Parameter
T
T
T
P
θ
θ
T
at points inside the module, as shown in Figure 32. The thermo-
couples should be positioned to obtain an accurate measurement
of the package top and paddle temperatures. Using the model
shown in Figure 33, the junction temperature can be calculated by
where:
θ
P is the power dissipated by the ADN2526.
PCB
TOP
PAD
J
J-TOP
J-PAD
J-TOP
TOP
THERMAL COMPOUND
DIE
COPPER PLANE
T
and T
and θ
J
=
Figure 33. Electrical Model for Thermal Calculations
PAD
P
J-PAD
×
Description
Temperature at the top of the package
Temperature at the package exposed paddle
IC junction temperature
Power dissipation
Thermal resistance from the IC junction to
the package top
Thermal resistance from the IC junction to
the package exposed paddle
Figure 32. Typical Optical Module Structure
can be determined by measuring the temperature
(
θ
are given in Table 2.
J
−
PAD
P
VIAS
×
θ
T
J
TOP
−
TOP
MODULE CASE
T
T PAD
TOP
θ
T
J
)
J
−
+
PAD
θ
θ
T
T
J-PAD
J-TOP
PAD
TOP
+
θ
×
J
θ
−
TOP
J
JA
−
T
PAD
TOP
) do not yield
+
T
THERMOCOUPLE
ADN2526
PAD
×
θ
J
−
TOP
Unit
°C
°C
°C
W
°C/W
°C/W