dtr-156-sm2-lc-ls-w OPLINK Communications Inc., dtr-156-sm2-lc-ls-w Datasheet - Page 6

• Manufacturer Part Number: dtr-156-sm2-lc-ls-w
• Description: Oc-3/stm-1 & Oc-12/stm-4 Sff Single Mode Transceivers
• Manufacturer: OPLINK Communications Inc.

Transmitter: When the DATA+ input is at logic HIGH and
DATA- input is at logic LOW, the laser diode is ON, and
vice versa. The transmitter is normally enabled (i.e. when
the TX Disable control input is not connected). When the
TX Disable control input voltage is higher than V
the laser is turned off independent of the input data.
The transmitter incorporates an Average Power Control
(APC) loop to stabilize the transmitter average optical output
power against temperature variation. The APC loop always
acts to keep the transmitter average optical output power at
a constant value; therefore, when the input data is all
continuous “zeroes” or all continuous “ones”, the transmitter
optical output power is a constant level equal to the nominal
average optical output power (not at the “OFF” level or at
the “ON” level).
Receiver: Both differential DATA+ and DATA- outputs are
LV-PECL levels requiring proper termination (see
recommended interface circuits). For optimum performance,
Application Notes
Interface circuit (AC-coupling)
+3.3V
VPD
+
SIGNAL DETECT
(see Note below)
10
ferrite inductor
+
+3.3V
10
1 H coil or
VCC
Note: If signal detect is LV-PECL, a termination resistor of 160
µ
DTR-xxx-SM2-LC-W & DTR-xxx-SM2-LS-W
ferrite inductor
TX Disable
0.1
1 H coil or
100
µ
circuit ground
0.1
0.1
+
10
Capacitor values in F, Resistor values in
11
13
8
1
2,3,6
DTR-xxx-SM2-
0.1
LC/LS-W
MOUNTING
chassis
ground
POSTS
CC
7
- 1.3V,
12,16
14
15
10
9
6
TXD+
RXD+
TXD -
RXD -
µ
both outputs should be terminated in the same manner even
if only one is used.
The signal detect circuit monitors the level of the incoming
optical signal and generates a logic LOW signal when an
insufficient photocurrent is produced. If the signal detect
output is LV-TTL level, no termination is required. If the
signal detect output is LV-PECL level, a termination resistor
of 160Ω to GND is required.
Interface circuit: Three interface circuit options are shown,
two with DC-coupling and one with AC-coupling.
The power supply line should be well-filtered. All 0.1µF
power supply bypass capacitors should be as close to the
transceiver module as possible. The two front GND posts
(mounting studs) should be grounded to chassis ground. If
chassis ground is not available, they should be connected
to circuit ground.
160
130
82
160
+3.3V
VCC
130
82
Ω
0.1
0.1
0.1
0.1
to GND is required
Ω
50
50
50
50
Ω
Ω
Ω
Ω
line
line
line
line
with proper
termination
with proper
termination
50
50
Ω IC
Ω IC
21737-0296, Rev. A
10-15-03