UPD7759C NEC [NEC], UPD7759C Datasheet - Page 4

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UPD7759C

Manufacturer Part Number
UPD7759C
Description
ADPCM SPEECH SYNTHESIZER LSIs
Manufacturer
NEC [NEC]
Datasheet

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4
1.2 PIN FUNCTION FOR STAND ALONE MODE
SAA
CS
(Abbre-
viation)
I0
I1
I2
I3
I4
I5
I6
I7
AEN/WR
ALE
MD
ST
A0
A1
A2
A3
A4
A5
A6
A7
A8
ASD0
ASD1
ASD2
ASD3
ASD4
ASD5
ASD6
ASD7
Pin
Pin No.
52-pin
QFP
23
38
11
12
15
16
17
18
19
21
25
34
35
41
42
43
44
45
47
48
49
50
51
10
22
2
3
4
5
8
9
Pin No.
40-pin
DIP
13
25
10
11
12
15
21
22
26
27
28
29
30
31
32
33
34
35
36
37
38
39
4
5
6
7
8
9
1
2
3
Output
Output/
Output
Output
Output
Input
Input/
Input
Input
Input
Input
I/O
Message selection code input.
The message selection code signals are positive logics.
Ground the pins not used.
These pins are connected to the internal latch circuit which
latches I0 to I7 data at the rising edge of the ST input.
In standby mode, these pins should be set high or low level.
If they are biased at or near the typical CMOS threshold,
the excess supply current is caused.
This signal is at low level while address signal is valid.
Controls the latch circuit for the higher 8 bits of the external
ROM address.
Outputs high level when the start address of a message stored
in the directory area of data memory, is being read out.
Determines the timing that higher 8 bits of the external ROM
address are externally latched. They must be latched at the
falling edge of the signal.
set at high-level.
Start signal input.
When ST goes low while CS is at low level, the PD7759 starts
synthesizing the message specified by I0 to I7. In standby
mode, this signal resets the standby mode and starts speech
synthesis.
Chip select signal input.
ST becomes valid when CS goes low.
Outputs the lower 9 bits of the external ROM address.
(1) Outputs the higher 8 bits of external ROM address.
(2) Inputs 8-bit speech synthesis data from the external ROM.
These functions are executed from (1) to (2) on a time-
shared basis.
Function
PD7759

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