f75334 Feature Integration Technology Inc., f75334 Datasheet
f75334
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f75334 Summary of contents
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... F75334DG Performance Controller Release Date: July, 2007 Version: V0.25P F75334 July, 2007 V0.25P ...
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... F75334DG Datasheet Revision History Version Date V0.10P 2005/09/01 V0.20P 2005/09/02 V0.21P 2005/10/13 V0.22P 2005/12/19 V0.23P 2006/07/04 V0.24P 2006/12/28 V0.25P 2007/7/6 Please note that all data and specifications are subject to change without notice. All the trade marks of products and companies mentioned in this data sheet belong to their respective owners. ...
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... Index 12h (Power by VSB3V) .........................23 Index 13h (Power by VSB3V) .........................................23 Index 14h (Power by VSB3V)......................................23 Index 15h (Power by VSB3V)..........................23 Index 16h (Power by VSB3V) .........................23 Index 17h (Power by VSB3V) .........................................23 Index 18h (Power by VSB3V)......................................24 Index 19h (Power by VSB3V)..........................24 F75334 July, 2007 V0.25P ...
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... Index 10h......................................................................27 Index 11h ...................................................................28 Index 12h ...............................................28 Index 13h ........................................................................28 Index 20h- 4Fh .......................................................................28 Index 60h..............................................................29 Index 61h ...........................................................29 Index 62h.........................................................30 Index 66h......................................................................30 Index 6Bh ...............................................................30 Index 90h ..........................................................................32 Index 91h........................................................................33 F75334 Index 0Ah ...................................26 July, 2007 V0.25P ...
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... VT3 BOUNDARY 4 TEMPERATURE – Index C9...........................................................42 Index 92h .....................................................................33 Index 93h ......................................................................33 Index 9Ch ...........................35 Index 9Dh ............................................35 – Index ACh......................................................38 – Index ADh .....................................................38 – Index AEh......................................................38 – Index AFh..........................................................38 – Index BCh......................................................40 – Index BDh .....................................................40 – Index BEh......................................................41 – Index BFh..........................................................41 F75334 July, 2007 V0.25P ...
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... Index 13h................................................47 Index 14h.................................................47 Index 15h..................................................47 Index 16h.................................................48 Index 17h.................................................48 Index 18h ....................................................48 Index 20h ..............................................................48 Index 21h ...........................................................48 Index 22h ...................................................48 Index 23h ....................................49 Index 25h ............................................................49 Index 26h ............................................................49 Index 30h....................................49 F75334 July, 2007 V0.25P ...
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... Index 01h...........................................................................50 Index 02h...........................................................................50 Index 03h .............................................................................50 Index 04h.....................................................................................50 Index 05h .....................................................................................50 Index 06h .....................................................................................50 Index 07h ....................................................................................51 Index 08h ....................................................................................51 Index 09h ....................................................................................51 Index 0Ah ..............................................51 Index 0Bh ........................................................................51 Index 0Ch .........................................................................51 Index 0Dh ...............................................52 F75334 July, 2007 V0.25P ...
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... Vcore voltage, then output the offset voltage for over/under voltage change use. Otherwise, F75334DG provides 21 GPIO pins for flexible application. The F75334DG supports three main features for system protection, system over/under-clocking and dynamic voltage ID control. The F75334DG can easy save total cost and improve system performance. Especially the over/under-clocking being easy function ...
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... Support 5 offset registers to mapping 5 different loading range Support Intel and AMD CPU Easy voltage sensor I/O (VSI/VSO) for easy over/under voltage change use. GPIO Support 21 GPIO pins Only support level mode GP output control GPIO pin status can be read by registers Noted: Patented TWI235553 TWI263778 2 F75334 July, 2007 V0.25P ...
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... Key Specification Supply Voltage Operating Supply Current 4. Block Diagram Power Supply PWM Controller CLK Gen. 3.0V to 3.6V 2.5 mA typ. VID Controller CPU Loading Gauge sensor Chipset Hardware Monitor Device or system temperature 3 F75334 CPU (Device) July, 2007 V0.25P ...
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... Pin Configuration F75334DG 4 F75334 July, 2007 V0.25P ...
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... Fan fault signal output pin. VSB3V GPIO pin. 12st PME# signal output pin. System management interrupt (Pure open drain). This pin will be active low when there is something wrong with voltage, 5 F75334 can diode/transistor temperature July, 2007 V0.25P ...
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... Voltage sensor input for Vcore voltage sensing. GPIO pin. 12st LED flashing pin. VSB3V Voltage sensor output for over/under voltage use. GPIO pin. 12st BEEP pin. VSB3V GPIO pin. 12st Turbo 2 pin for CLK Gen over/under clocking. 6 F75334 0.9, VIL 0.6. 0.9, VIL 0.6. July, 2007 V0.25P ...
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... VCC3V Turbo 0 pin for CLK Gen over/under clocking. VCC3V Turbo 1 pin for CLK Gen over/under clocking. GPIO pin. 12st VCC3V Stop signal for chipset use. GPIO pin. 12st Intel PECI hardware monitor interface. AMD SI data interface F75334 July, 2007 V0.25P ...
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... F75334DG and the second function is that voltage with 3.3V is connected to internal serial resistors to monitor the +3.3V voltage. The internal serial resistors are two 150K ohm, so that the internal reduced voltage is half of +3.3V. There are four voltage inputs in the F75334DG and the voltage divided formula is shown as follows × ...
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... Reset when Interrupt Status Registers are written 1 The F75334DG monitors a local and three remote temperature sensors. Both can be measured from -25°C to 145°C. The temperature format is as the following table: MSB 00000000_001xxxx0 ...
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... Monitor Temperature from “thermal diode” Also, if the CPU, GPU or external circuits provide thermal diode for temperature measurement, the F75334DG is capable to these situations. The build-in reference table is for PNP 2N3906 transistor, and each different kind of thermal diode should be matched with specific BJT gain. In the Figure 7-1, the transistor is directly connected into temperature pins. ...
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... Status Register HYST SMI# (pulse mode) (level mode active low) *Interrupt Reset when Interrupt Status Registers are written 1 Fig 7 Fig 7-4 11 F75334 July, 2007 V0.25P ...
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... Count RPM 12 F75334 Pull-up resister < totem-pole output > 1K Fan Input FANIN 1 3.3V Zener F75334DG and Zener Clamp Pull-up resister < totem-pole output > 1K Fan Input FANIN1 3.3V Zener F75334DG Fan with Tach Pull-Up to +5V, or Totem-Pole Putput and Zener Clamp July, 2007 V0.25P ...
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... As for fan, it would be best to use 2 pulses tachometer output per round. Fan speed control The F75334DG provides 2 fan speed control methods: 1. LINEAR FAN CONTROL 2. PWM DUTY CYCLE Linear Fan Control The range of DC output is 0~3.3V, controlled by 8-bit register. 1 LSB is about 0.013V. ...
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... FAN EXPECT COUNT that define in registers. Then, the F75334DG will adjust PWMOUT duty-cycle to meet the expected value. It can be said that the fan will be turned on with a specific speed set by BIOS and automatically controlled with the temperature variation. The F75334DG will take charge of all the fan speed control and need no software support. Programmed 8bit ...
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... If both (1) and (2) are not true, (4). When PWMOUT duty-cycle decrease to MIN_DUTY(≠ 00h), obviously the duty-cycle will decrease to 00h next, the F75334DG will keep duty-cycle at 00h for 1.6 seconds. After that, the F75334DG starts to compare current fan count and expected count in order to increase or decrease its duty-cycle. This ensures that if there is any glitch during the period, the F75334DG will ignore it ...
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... Duty-cycle Fan_Fault# (2). After the period of detecting fan full speed, when PWM_Duty > Min. Duty, and fan count still in 0xFFF. 7.2 Loading Gauge F75334DG support 16 bit PWM duty reading value and four duty limits (12 bits) for auto control system performance. Hyst4 limit4 Hyst3 limit3 ...
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... TURBO STATE_AUTO[2:0] STATE_MANUAL[2:0 When under clocking F75334DG will decrease system frequency after 20ms it start to change VID value to deduce CPU Vcore voltage, In order to prevent chipset fail during frequency change, F75334DG use STOP# signal to disable chipset temporarily. OVER CLKING 2 STATE_AUTO STOP# 2 TURBO# 2 VID_OFFSET_SEL 7 ...
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... When enable over loading shutdown function and the TURBO2# event turn-off the CPU_SEL[2:0] ] MANUAL_MODE OTF_EN VID OTF Controller VID_IN[7:0] INTEL_VRM10.0 INTEL_VRM10.0 Extend VID_OFFSET[7:0] INTEL_VRM11.0 AMD VRM AMD VRM Extend VID_MANUAL[7:0] VID_WatchDog Timer Fig 7-17 833Hz 416Hz Fig 7-18 18 F75334 VID_OUT[7:0] WD_TMOUT 833Hz 416Hz July, 2007 V0.25P ...
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... Vcc3vok LG_limit3_exc LG_limit2_exc LG_limit1_exc LG_limit0_exc LED But if over temperature shutdown function is enabled and after the system power turn-off then the LED pin will output 0.625Hz clock(Fig 7-21), 833Hz 416Hz Fig 7-19 0.15Hz 0.3125Hz 0.625Hz Fig 7-20 19 F75334 833Hz 416Hz 1.25Hz 2.5Hz July, 2007 V0.25P ...
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... OVT_shutdown_enable OVT# LED VCC3V If over loading shutdown function is enabled then after the system power shutdown then the LED pin will output 0.312Hz clock(Fig 7-22), Turbo_shutdown_enable Turbo[2]# LED vcc3v 0.625Hz Fig 7-21 0.312Hz Fig 7-22 20 F75334 July, 2007 V0.25P ...
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... Select to hardware monitor module. 2’b01: Select to loading gauge module. 2’b10: Select to VID control module. 2’b11: Select to global function. Enable ARA mode, when F75334DG receive ARA command will auto clear 0 GLOBAL_PME_EN bit (CR01 bit 4) 0: PME event will be low active PME event will be high active ...
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... GPIO43 Pin 43 will use as FAN_CTRL3 function. 1: pin 42 will be GPIO42 Pin 42 will use as FAN_IN3 function. 1: pin 29 will be GPIO41 Pin 29 will use as STOP# function. 1: pin 28 will be GPIO40 Pin 28 will use as TURBO1# function. 22 F75334 Description Description July, 2007 V0.25P ...
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... GPIO25~GPIO20 output data, when output function was enable, the data 0h set in these registers will be output GPIO25~GPIO20 output control pins, when set to 1 the relative pin output 0h function will be enable for open drain 0h 1: for push pull -- 0h 23 F75334 Description Description Description Description Description Description Description Description July, 2007 V0.25P ...
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... Pin7 will be a OVT + Fan_Fault functions pin - -- GPIO43~GPIO40 output control pins, when set to 1 the relative pin output 0 function will be enable GPIO43~GPIO40 output control pins, when set to 1 the relative pin output 0 function will be enable. 24 F75334 Description Description Description Description Description Description Description July, 2007 V0.25P ...
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... These registers are read only, they reflect the relative pin real status -- Chip ID, High byte (8’h04). 04h Chip ID, Low byte (8’h14). 14h Vendor ID, high byte (8’h19) 19h Vendor ID, low byte (8’h34) 34h 25 F75334 Description Description Description Description Description Description July, 2007 V0.25P ...
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... PECI output high level will be 1.00V Select the CPU temperature measure method 0 00: External thermal diode. 01: PECI interface. 10: AMDSI interface. 11: Reserved. When AMDSI interface enable, this will be AMDSI version register. - Return the AMDSI version. - Reserved 26 F75334 Description Description Description Description Description July, 2007 V0.25P ...
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... A one enables the corresponding interrupt status bit for PME# interrupt one enables the corresponding interrupt status bit for PME# interrupt 0 A one enables the corresponding interrupt status bit for PME# interrupt F75334 Description Description Description Description -Scale[2:0] -Scale[2:0] Description July, 2007 V0 ...
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... VCC3V reading. The unit of reading is 8mV. V1 reading. The unit of reading is 8mV. V2 reading. The unit of reading is 8mV. V3 reading (MSB). The unit of reading is 8mV. V4 reading (MSB). The unit of reading is 8mV. VSB3V reading. The unit of reading is 8mV. 28 F75334 Description Description Reserved Description July, 2007 V0.25P ...
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... Write 1 to clear this bit, write 0 will be ignored. A one indicates TEMP1 temperature sensor has exceeded high limit or 0 below the “high limit –hysteresis” limit. Write 1 to clear this bit, write 0 will be ignored. 29 F75334 Description Description July, 2007 V0.25P ...
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... TEMP3 is connected to a thermistor 1 1: TEMP3 is connected to a BJT.(default) 0: TEMP2 is connected to a thermistor TEMP2 is connected to a BJT. (default) 0: TEMP1 is connected to a thermistor 1 1: TEMP1 is connected to a BJT.(default local is connected to a BJT. 30 F75334 Description Description Description July, 2007 V0.25P ...
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... CR75 bit 0 is the sign bit of the temperature 2. (when open or short this byte will return 1, “sign bit set to 1”) Temperature 3 reading. The unit of reading is 1 register. CR77 bit7-bit5 are the temperature 3 reading value[2:0]. The unit of reading is 31 F75334 Description Description Description º C.At the moment of º ...
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... The queue time for second filter to quickly update values. 00: 8 times. 1h 01: 16 times (default). 10: 24 times. 11: 32 times. Reserved 0h Reserved 0h Reserved 0h Reserved 0h 32 F75334 º C. º C. º C. º C. º C. º C. º C. º C. Description Description July, 2007 V0 ...
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... A one enables the corresponding interrupt status bit for PME# interrupt one enables the corresponding interrupt status bit for PME# interrupt 0h A one enables the corresponding interrupt status bit for PME# interrupt. 0h 2’b0S Reserved 33 F75334 Description Description Reserved Description Description July, 2007 V0.25P ...
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... Auto fan speed control, fan speed will follow different temperature by different duty cycle that define in 0xA6-0xAE. 1h 10: Manual mode fan control, user can write expect RPM count to 0xA2-0xA3, and F75334 will auto control duty cycle (PWM fan type) or voltage(linear fan type) to control fan speed. 11: Reserved 0000: Boundary hysteresis. (0~15 degree C) ...
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... Set 1 that fan speed will keep current temp. status before system re-boot 0 up. Set 1 that fan speed will keep current temp. status before system re-boot 0 up. Set 1 that fan speed will keep current temp. status before system re-boot 0 up. 35 F75334 Description Description Description Description Description July, 2007 V0.25P ...
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... When VT1 temperature is exceed this boundary, FAN1 expect value will o (60 C) load from segment 1 register (index AA)h. When VT1 temperature is below this boundary – hysteresis, FAN1 expect value will load from segment 2 register (index AAh). Return 0 when read F75334 0) this Description Description July, 2007 V0.25P ...
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... D9h 2’b00: The value that set in this byte is the relative expect fan speed % of the full speed in this temperature section. 2’b01: The value that set in this byte is mean the expect PWM duty-cycle in this temperature section. 37 F75334 Description Description Description × ...
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... Set 0 that FAN1 speed will decrease to FAN1 SEGMENT 2 SPEED by slop value( CR9B) when temperature under FAN1 Boundary Hystersis. 0: fan1 follow local temperature. 1: fan1 follow temperature fan1 follow temperature 2. 3: fan1 follow temperature 3. 38 F75334 Description Description Description Description July, 2007 V0.25P ...
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... When VT2 temperature is exceed this boundary, FAN2 expect value will o C) load from segment 3 register (index BC)h. When VT2 temperature is below this boundary – hysteresis, FAN2 expect value will load from segment 4 register (index BCh). 39 F75334 0) this Description Description Description July, 2007 V0.25P ...
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... The value that set in this byte is the relative expect fan speed % of the full speed in this temperature section. 2’b01: The value that set in this byte is mean the expect PWM duty-cycle in this temperature section. – Index BDh 40 F75334 Description Description × Full speeed ...
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... MSB first and followed read the LSB. FAN3 count reading (LSB). RPM mode(CR96 bit4=0): FAN3 expect speed count value (MSB), in auto fan mode(CR96 bit5 register is auto updated by hardware. Duty mode(CR96 bit4=1): This byte is reserved byte. RPM mode(CR96 bit4=0): 41 F75334 Description Description 0) this July, 2007 V0.25P ...
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... When VT3 temperature is exceed this boundary, FAN3 expect value will o C) load from segment 4 register (index CDh). When VT3 temperature is below this boundary – hysteresis, FAN3 expect value will load from segment 5 register (index CDh). 42 F75334 Description Description Description Description July, 2007 V0.25P ...
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... The value that set in this byte is mean the expect PWM duty-cycle in this temperature section. – Index CFh If this bit set to 1, when detect loading increase acutely, fan3 will pre-up 0 fan speed 43 F75334 Description × Full speeed (100-X)*32/X ...
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... FAN3 Boundary Hystersis. Set 0 that FAN3 speed will decrease to FAN3 SEGMENT 2 SPEED by slop value( CR9B) when temperature under FAN3 Boundary Hystersis. 0: fan3 follow local temperature. 1: fan3 follow temperature fan3 follow temperature 2. 3: fan3 follow temperature 3. 44 F75334 July, 2007 V0.25P ...
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... Loading gauge clock will 6.25 Mhz 1 1: 12.5 Mhz 2, 3: 25Mhz 0: Gauge high level of PWMIN 0 1: Gauge low level of PWMIN MSB of loading gauge reading 0 LSB of loading gauge reading 0 MSB of loading gauge limit1 0 45 F75334 Description Description Description Description Description July, 2007 V0.25P ...
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... MSB of loading gauge limit2 0 LSB of loading gauge limit2 0 Limit2[0] is used to set overclocking(set underclocking (set to 0) reserved 0 MSB of loading gauge hysteresis2 0 LSB of loading gauge hysteresis2 0 reserved 0 MSB of loading gauge limit3 0 46 F75334 Description Description Description Description Description Description Description Description July, 2007 V0.25P ...
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... MSB of loading gauge limit4 0 LSB of loading gauge limit4 0 Limit4[0] is used to set overclocking(set underclocking (set to 0) reserved 0 MSB of loading gauge hysteresis4 0 LSB of loading gauge hysteresis4 0 reserved 0 Reserved 0 Section1 mapping value 1 Reserved 0 47 F75334 Description Description Description Description Description Description Description Description July, 2007 V0.25P ...
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... If loading gauge reading moves across limit1 (up or down) and this bit is 0 set to 1, the LG_PME_STS will be set to 1. Reserved 0 Set STOP_CNT can modify the pulse period of pin STOP#. 0 Stop time = 30 + (5*STOP_CNT F75334 Description Description Description Description Description Description July, 2007 V0.25P ...
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... Set this bit to 1 for sorting hysteresis. It will be auto cleared after finish 0 sorting. Reserved 0 Set this bit to enable one-shot. If one-shot is finished, gauge_counter_dis 0 bit will be set another one-shot is needed, just write gauge_counter_dis bit F75334 Description Description Description When loading status run over Description July, 2007 V0.25P ...
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... VID_OFFSET0 is selected as the offset of VID. VID_OFFSET0[ sign bit. (Protected by serial key) If “CURRENT_SEC” in loading gauge register (Index 18h VID_OFFSET1 is selected as the offset of VID. VID_OFFSET1[ sign bit. (Protected by serial key) 50 F75334 Description Description Description Description Description Description July, 2007 ...
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... If this bit is set to 1, the switch value equals to the selected vid offset[3:0] 0 (Protected by serial key) Set to 1 the pin GPIO10/LED and GPIO11/BEEP will short. (Protected by 1 serial key) Reserved (Dummy registers) (Protected by serial key F75334 Description Description Description Description Description Description July, 2007 V0.25P ...
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... GP2_SEL_CLR_DIS is 0. (Protected by serial key) This bit is function select of VID_OUT[5] / GPIO2[0]. If GP2_SEL0 the selected function is VID_OUT. This bit is also cleared by slotocc and reset signal of watchdog timeout if GP2_SEL_CLR_DIS is 0. (Protected by serial key) 52 F75334 Description July, 2007 V0.25P ...
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... I2C interface polling. FAN and loading gauge in ILDE mode, I2C interface stop. High Level Low Level SYM. MIN. TYP. MAX. VIL 0.8 VIH 2.0 IOL +12 ILIH +1 ILIL -1 53 F75334 UNIT V V ° C ° C MIN TYP MAX ± ± 1 ± 3 < 145 C D ± 1 ± 3 3.0 3.3 3 ...
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... ILIH +1 ILIL -1 VIL 0.6 VIH 0.9 ILIH +1 ILIL -1 IOL -12 IOL -12 -9 IOH +9 +12 Production Flow Commercial, 0°C to +70°C 54 F75334 V VCC = 3 VCC = 3 VOL = 0 VOH = 2.4V µA VIN = VCC µA VIN = 0V V VCC = 3 VCC = 3 VOL = 0 VOH = 2.4V µA VIN = 1.2V µA ...
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... Detail F Taipei Office Bldg. K4, 7F, No.700, Chung Cheng Rd., Chungho City, Taipei, Taiwan 235, R.O.C. TEL : 866-2-8227-8027 FAX : 866-2-8227-8037 55 F75334 Dimension in inch Dimension in mm Symbol Min. Nom. Max. Min. Nom. Max. A 1.60 --- --- A 0.05 0.15 --- ...
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... POWER-MOS, Linear Regulator and Clock generator. Keep as far as possible from POWER MOS. 2. Place an external 3300pF input filter capacitors across THERMDA, THERMDC and close to the F75334D. Near the pin D- (Pin# 2) Must Be placed a through hole into the GND Plane before connect to the external 3300pF capacitor. ...
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... R11 4.7K FAN_IN3 R12 27K C6 R14 0.1u 10K Title Size A Date: 57 F75334 PMOS 1N4148 LM358 R2 4.7K JP2 FAN_IN2 R4 27K 47u 1 10K C4 R8 0.1u 10K CON3 F75334 Application circuit Document Number Rev <Doc> Monday , July 03, 2006 Sheet <Rev Code> July, 2007 V0.25P ...
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... Q9 R70 4.7K JP6 FAN_IN3 R72 27K 3 C16 2 47u C17 1 0.1u R74 CON3 10K 12V D7 1N4148 R78 4.7K FAN_IN1 R81 27K C18 0.1u R83 10K Title F75334 Application circuit Size Document Number Rev B <Doc> Date: Monday , July 03, 2006 Sheet <Rev Code> July, 2007 V0.25P ...
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... VIDOUT0 VIDOUT1 VIDOUT2 F75334D VIDOUT3 VIDOUT4 VIDOUT5 For VRM 10.0 VCORE PWM Controller R113 0 R114 R115 0 0 VCORE controlled by F75334 R115:ON R114:ON R113:OFF VCORE by-pass R115:OFF R114:OFF R113:ON F75334 VSI/VSO PWM Controller 3VCC VTT1.2 R88 4.7k R96 4.7k R104 4.7k R106 4.7k R97 R97 R98 R99 ...