f75375 Feature Integration Technology Inc., f75375 Datasheet - Page 22

• Manufacturer Part Number: f75375
• Description: Fintek Hardware Monitor Ic Datasheet
• Manufacturer: Feature Integration Technology Inc.

7.4
Power on default <7:0> = xx00_0000 b
Configuration Register  Index 03h
1
0
7
5
3-4
2
1-0
Bit
F_FAULT_MODE
F_FAULT_LEVEL
Fintek
V_FAULT_QUE
PIN6_MODE
OVT_LEVEL
OVT_QUEUE
V_FAULT_LEVE
L
UE
Name
Attribute
R/W
R/W
R/W
R/W
R/W
R/W
R/W
When set this bit to 0 the fan fault will be level mode, else if set to 1
the fan fault will indicate by LED function(1Hz or 0.5Hz) the LED
frequency can set by REG02H bit2.
This mode is trappable: When PIN3 trapped to high at power-on, this
mode is set to LED function. When PIN3 trapped to low at power-on,
this mode is set to level mode.
When set this bit to 0 fan fault is low active (default). if set to 1 fan
fault is high active
00: pin6 function is GPIO3.
01: pin6 is used as OVT
10: pin6 is used as Voltage fault function
11: pin6 is as operating clock input function. The External clock
should be 48MHz. This input clock will be the clock source of the
whole chip.
This mode is trappable: When PIN3 trapped to high at power-on,
PIN6 is set to OVT. When PIN3 trapped to low at power-on, PIN6 is
set to GPIO3.
When set this bit to 0 OVT is low active (default), else if set to 1 OVT
is high active
OVT queue is use to filter the temperature noise, it define the times of
the event when OVT is asserted.
00: 1 times
01: 3 times
10: 5 times
11: 7 times
Voltage fault level. When set this bit to 0 voltage fault is low active
(default). if set to 1 fan fault is high active
Voltage fault queue. It is used to filter the voltage noise, the follow
define the times of the event when VOLT_FAULT is asserted.
00: 1 times
01: 3 times
16
Feature Integration Technology Inc.
Description
F75375S/F75375SG
July 2007
V0.26P