dm9000b Davicom Semiconductor, Inc., dm9000b Datasheet - Page 18

• Manufacturer Part Number: dm9000b
• Description: Ethernet Controller With General Processor Interface
• Manufacturer: Davicom Semiconductor, Inc.

6.11 RX/TX Flow Control Register ( 0AH )
6.12 EEPROM & PHY Control Register ( 0BH )
6.13 EEPROM & PHY Address Register ( 0CH )
6.14 EEPROM & PHY Data Register (EE_PHY_L:0DH
Final
Version: DM9000B-13-DS-F02
June 4, 2009
7:0
7:0
Bit
Bit
7:6
7:6
5:0
Bit
Bit
7
6
5
4
3
2
1
0
5
4
3
2
1
0
RESERVED
PHY_ADR
EE_PHY_H
EE_PHY_L
ERPRW
RXPCS
ERPRR
TXPEN
EROA
Name
BKPM
Name
BKPA
RXPS
EPOS
ERRE
TXPF
FLCE
Name
REEP
TXP0
WEP
Name
P01,RW
Default
Default
PS0,RW
PS0,RW
PS0,RW
PS0,RW
PS0,RW
PS0,R/C
PS0,RW
P0,RW
Default
PS0,RO
P0,RW
P0,RW
P0,RW
P0,RW
P0,RW
P0,RO
Default
0,RO
P0,RW
P0,RW
Reserved
Reload EEPROM. Driver needs to clear it up after the operation completes
Write EEPROM Enable
EEPROM or PHY Operation Select
When reset, select EEPROM; when set, select PHY
EEPROM Read or PHY Register Read Command. Driver needs to clear it up after
the operation completes.
EEPROM Write or PHY Register Write Command. Driver needs to clear it up after
the operation completes.
EEPROM Access Status or PHY Access Status
When set, it indicates that the EEPROM or PHY access is in progress
PHY Address bit 1 and 0, the PHY address bit [4:2] is force to 0. Force to 01 in
application.
EEPROM Word Address or PHY Register Number.
TX Pause Packet
Auto clears after pause packet transmission completion. Set to TX pause packet
with time = 0000h
TX Pause packet
Auto clears after pause packet transmission completion. Set to TX pause packet
with time = FFFFH
Force TX Pause Packet Enable
Enables the pause packet for high/low water threshold control
Back Pressure Mode
This mode is for half duplex mode only. It generates a jam pattern when any
packet comes and RX SRAM is over BPHW of register 8.
Back Pressure Mode
This mode is for half duplex mode only. It generates a jam pattern when a packet’s
DA matches and RX SRAM is over BPHW of register 8.
RX Pause Packet Status, latch and read clearly
RX Pause Packet Current Status
Flow Control Enable
Set to enable the flow control mode (i.e. can disable DM9000B TX function)
EEPROM or PHY Low Byte Data
The low-byte data read from or write to EEPROM or PHY.
EEPROM or PHY High Byte Data
The high-byte data read from or write to EEPROM or PHY.
Ethernet Controller with General Processor Interface
EE_PHY_H:0EH)
Description
Description
Description
Description
DM9000B
18