com81c17 Standard Microsystems Corp., com81c17 Datasheet - Page 11

• Manufacturer Part Number: com81c17
• Description: Twenty Pin Uart Tpuart Corporation
• Manufacturer: Standard Microsystems Corp.

INTERRUPT MASK REGISTER DESCRIPTION
This is an eight bit write only register which is
loaded by the processor. These bits are used to
enable interrupts from the corresponding bits in
the Status Register. This register is reset with
internal reset.
The first write to address zero (RS = 0) will
access the Mode Register, the second will
access the Interrupt Mask Register, the third will
access the Baud Rate Select Register, the fourth
and all subsequent writes will access the TX
Buffer Register.
RS
0
0
1
1
X
RS0
0
1
1
1
1
nRD nWR nCS
X
0
1
0
1
Table 7 - INTERNAL REGISTER SELECT
RS1
1
0
1
1
1
Table 6 - DECODE TRUTH TABLE
X
1
0
1
0
RS2
1
1
0
1
1
0
0
0
0
1
RS3
1
1
1
0
0
READ RX BUFFER REGISTER
WRITE TO TX BUFFER
REGISTER
READ STATUS REGISTER
WRITE TO CONTROL
REGISTER
DATA BUS IN TRI STATE
11
AFTER RESET
AFTER FIRST WRITE
AFTER SECOND WRITE
AFTER THIRD WRITE
ALL SUBSEQUENT
WRITES
REGISTER DECODE & TRUTH TABLE
The TPUART provides unique decode capability
to three of the seven internal processor
accessible register.
Register (read only), the Status Register (read
only) and the Control Register (write only). The
other four registers (write only) are decoded in a
sequential manner following reset.
table below:
Following reset, the decode sequence of writes
to address 0 is as follows:
RS0 - Selects the Mode Control Register
RS1 - Selects the Interrupt Mask Register
RS2 - Selects the Baud Rate Select Register
RS3 - Selects the TX Buffer Register
These are the RX Buffer
Refer to