hd61603r ETC-unknow, hd61603r Datasheet - Page 24

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hd61603r

Manufacturer Part Number
hd61603r
Description
Segment Type Lcd Driver
Manufacturer
ETC-unknow
Datasheet
Notes on READY Output
Note that the READY output will be unsettled during 1.5 clocks (max) after inputting the first 2-byte data
for setting the mode after turning the power on. This is because the READY bit data of mode setting
latches and the mode of READY pin (READY bus or port mode) are unsettled until the completion of
mode setting.
There are two kinds of the READY output waveforms depending of the modes:
1. READY bus mode (READY bit = 0)
2. READY port mode (READY bit = 1)
However, if you input SYNC before mode setting, waveform will be determined; when you choose
READY bus mode, (1) a in Figure 18 will be output, and when you choose READY port mode, (2) a will
be output. The figures can be applied both to HD61602 and HD61603.
CE
WE
D0–D7
WE
RE
READY
WE
READY
Power on
Power on
Power on
Figure 18 READY Output According to Modes
Note: CS = low, RE = high
Note: CS = low
Mode setting latch is unsettled.
(1) READY Bus Mode
(2) READY Port Mode
Mode setting data
1st
(2-byte data)
1.5 clocks (max)
1.5 clocks (max)
a
b
2nd
a
b
3.5 clocks (max)
Mode setting data are
latched.
1.5 clocks (max)
READY output is unsettled.
HD61602/HD61603
1253

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