lh5p832 Sharp Microelectronics of the Americas, lh5p832 Datasheet

lh5p832

Manufacturer Part Number

lh5p832

Description

Manufacturer

Sharp Microelectronics of the Americas

Datasheet

1.LH5P832.pdf (9 pages)

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LH5P832

FEATURES

DESCRIPTION

ganized as 32,768

con-gate CMOS process technology.

cuitry with a DRAM memory cell for pseudo static

operation. This simplifies external clock inputs, while

providing the same simple, non-multiplexed pinout as

industry standard SRAMs. Moreover, due to the func-

tional similarities between PSRAMs and SRAMs, many

32K

with little or no changes. The advantage is the cost

savings realized with the lower cost PSRAM.

The LH5P832 is a 256K bit Pseudo-Static RAM or-

The LH5P832 uses convenient on-chip refresh cir-

32,768

Access time: 100/120 ns (MAX.)

Cycle time: 160/190 ns (MIN.)

TTL compatible I/O

256 refresh cycle/4 ms

Auto refresh is executed by internal

counter (controlled by OE/RFSH pin)

Self refresh is executed by internal timer

Single +5 V power supply

Packages:

Power consumption:

Operating: 357.5/303 mW

Standby: 16.5 mW

28-pin, 600-mil DIP

28-pin, 300-mil SK-DIP

28-pin, 450-mil SOP

8 SRAM sockets can be filled with the LH5P832

8 bit organization

8 bits. It is fabricated using sili-

CMOS 256K (32K

between DRAM and SRAM by offering low cost, low

standby power, and a simple interface.

maximum versatility. A ‘CE-Only’ refresh cycle re-

freshes the addressed row of memory cells transpar-

ently. All 256 rows must be refreshed or accessed every

four milliseconds. ‘Auto Refresh’ automatically cycles

through a different row on every OE/RFSH clock pulse,

accomplishing the row refreshes without the need to

supply row addresses externally. ‘Self Refresh’ further

simplifies the refresh requirements by eliminating the

need for address inputs and clock pulses entirely. An

automatic timer senses time periods when memory

accesses have ceased, and provides full refresh of all

rows of memory without any external assistance.

PIN CONNECTIONS

The LH5P832 PSRAM has the ability to fill the gap

Three methods of refresh control are provided for

28-PIN DIP

28-PIN SK-DIP

28-PIN SOP

Figure 1. Pin Connections for DIP, SK-DIP,

GND

I/O

and SOP Packages

8) Pseudo-Static RAM

OE/RFSH

I/O

R/W

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5P832-1

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