thc63lvd103d THine Electronics,Inc., thc63lvd103d Datasheet

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thc63lvd103d

Manufacturer Part Number
thc63lvd103d
Description
135mhz 30bits Color Lvds Transmitter
Manufacturer
THine Electronics,Inc.
Datasheet

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THC63LVD103D
0
THC63LVD103D _Rev.1.0_E1
General Description
The THC63LVD103D transmitter is designed to sup-
port pixel data transmission between Host and Flat
Panel Display from NTSC up to SXGA+ resolutions.
The THC63LVD103D converts 35bits of CMOS/TTL
data into LVDS(Low Voltage Differential Signaling)
data stream. The transmitter can be programmed for ris-
ing edge or falling edge clocks through a dedicated pin.
At a transmit clock frequency of 135MHz, 30bits of
RGB data and 5bits of timing and control data
(HSYNC, VSYNC, DE, CNTL1, CNTL2) are transmit-
ted at an effective rate of 945Mbps per LVDS channel.
Block Diagram
Copyright 2007 THine Electronics, Inc. All rights reserved.
CMOS/TTL INPUT
(8 to135MHz)
TD0-6
TE0-6
TA0-6
TB0-6
TC0-6
/PDWN
135MHz 30Bits COLOR LVDS Transmitter
CLK IN
RS
R/F
7
7
7 7
7
7
THC63LVD103D
7
1
PLL
Features
Wide dot clock range: 8-135MHz suited for NTSC,
VGA, SVGA, XGA,SXGA and SXGA+
PLL requires no external components
Supports spread spectrum clock generator
On chip jitter filtering
Clock edge selectable
Supports reduced swing LVDS for low EMI
Power down mode
Low power single 3.3V CMOS design
64pin TQFP
Pin compatible with THC63LVD103(30bits)
(8 to 135MHz)
TA +/-
TB +/-
TE +/-
TD +/-
TC +/-
TCLK +/-
LVDS OUTPUT
THine Electronics, Inc.

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