ST72325 STMICROELECTRONICS [STMicroelectronics], ST72325 Datasheet - Page 24
ST72325
Manufacturer Part Number
ST72325
Description
8-BIT MCU WITH 16 TO 60K FLASH/ROM, ADC, CSS, FIVE TIMERS, SPI, SCI, I2C INTERFACE
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.ST72325.pdf
(193 pages)
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ST72325
5 CENTRAL PROCESSING UNIT
5.1 INTRODUCTION
This CPU has a full 8-bit architecture and contains
six internal registers allowing efficient 8-bit data
manipulation.
5.2 MAIN FEATURES
■
■
■
■
■
■
■
■
Figure 10. CPU Registers
24/193
Enable executing 63 basic instructions
Fast 8-bit by 8-bit multiply
17 main addressing modes (with indirect
addressing mode)
Two 8-bit index registers
16-bit stack pointer
Low power HALT and WAIT modes
Priority maskable hardware interrupts
Non-maskable software/hardware interrupts
RESET VALUE = STACK HIGHER ADDRESS
RESET VALUE = RESET VECTOR @ FFFEh-FFFFh
15
15
RESET VALUE = 1
PCH
8 7
8
RESET VALUE = XXh
RESET VALUE = XXh
RESET VALUE = XXh
7
7
7
1
7
7
1 1 X 1 X X
1 I1 H I0 N Z
PCL
0
0
0
0
X
0
0
C
5.3 CPU REGISTERS
The 6 CPU registers shown in
present in the memory mapping and are accessed
by specific instructions.
Accumulator (A)
The Accumulator is an 8-bit general purpose reg-
ister used to hold operands and the results of the
arithmetic and logic calculations and to manipulate
data.
Index Registers (X and Y)
These 8-bit registers are used to create effective
addresses or as temporary storage areas for data
manipulation. (The Cross-Assembler generates a
precede instruction (PRE) to indicate that the fol-
lowing instruction refers to the Y register.)
The Y register is not affected by the interrupt auto-
matic procedures.
Program Counter (PC)
The program counter is a 16-bit register containing
the address of the next instruction to be executed
by the CPU. It is made of two 8-bit registers PCL
(Program Counter Low which is the LSB) and PCH
(Program Counter High which is the MSB).
ACCUMULATOR
X INDEX REGISTER
Y INDEX REGISTER
PROGRAM COUNTER
CONDITION CODE REGISTER
STACK POINTER
X = Undefined Value
Figure 10
are not
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