tc9256afg TOSHIBA Semiconductor CORPORATION, tc9256afg Datasheet

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tc9256afg

Manufacturer Part Number
tc9256afg
Description
Pll For Dts
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
PLL for DTS
are phase-locked loop (PLL) LSIs for digital tuning systems (DTS)
with built-in two-modulus prescalers.
tuning systems.
Features
The TC9256APG, TC9256AFG, TC9257APG and TC9257AFG
All functions are controlled through three serial bus lines.
These LSIs are used to configure high-performance digital
Suitable for use in digital tuning systems in high-fi tuners and
car stereos.
Built-in prescalers operate at an input frequency ranging from
30 to 150 MHz during FM
prescaler) and at 0.5 to 40 MHz during AM
two-modulus prescaler or direct dividing)
16-bit programmable counter, dual parallel output phase
comparator, crystal oscillator and reference counter
3.6 MHz, 4.5 MHz, 7.2 MHz or 10.8 MHz crystal oscillators
can be used.
15 possible reference frequencies (when using 4.5 MHz
crystal):ref. = 0.5 k, 1 k, 2.5 k, 3 k, 3.125 k, 3.90625 k, 5 k, 6.25
k, 7.8125 k, 9 k, 10 k, 12.5 k, 25 k, 50 k and 100 kHz.
Built-in 20-bit general-purpose counter for such uses as
measuring intermediate frequencies (IF
low-frequency pilot signal cycles (SC
measurement function is available on the TC9256APG and
TC9256AFG.)
High-precision (±0.55 to ±7.15 µs) PLL phase error detection
Numerous general-purpose I/O pins for such uses as
peripheral circuit control
Four N-channel open-drain output ports (OFF withstanding
voltage: 12 V) for such uses as control signal output.
(TC9256APG and TC9256AFG have only three ports.)
Standby mode function (turns off FM, AM and IF amps) to
save current consumption
All functions controlled through three serial bus lines
CMOS structure with operating power supply range of V
5.0 ± 0.5 V.
16-pin DIP (TC9256APG), 20-pin DIP (TC9257APG), 16-pin
SOP (TC9256AFG), 20-pin SOP (TC9257AFG) packages
TC9256APG, TC9256AFG, TC9257APG,
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
IN
input (with two-modulus
IN
). (No cycle
IN1
TC9257AFG
IN
and IF
input (with
IN2
1
) and
DD
=
Weight
P-DIP16-300-2.54A: 1.0 g (typ.)
P-DIP20-300-2.54A: 1.24 g (typ.)
P-SOP16-300-1.27A: 0.16 g (typ.)
P-SOP20-300-1.27A: 0.48 g (typ.)
TC9256APG
TC9257APG
TC9256AFG
TC9257AFG
TC9256, 57APG/AFG
2006-07-14

Related parts for tc9256afg

tc9256afg Summary of contents

Page 1

... Four N-channel open-drain output ports (OFF withstanding • voltage for such uses as control signal output. (TC9256APG and TC9256AFG have only three ports.) Standby mode function (turns off FM, AM and IF amps) to • save current consumption All functions controlled through three serial bus lines • ...

Page 2

... Pin Assignment (Top view) TC9256APG, TC9256AFG Block Diagram Note: There are no pins marked Pin names and numbers in parentheses apply to the TC9256APG and TC9256AFG. Other pins are common to the TC9256APG, TC9256AFG, TC9257APG and TC9257AFG. TC9257APG, TC9257AFG in the TC9256APG or TC9256AFG. 2 TC9256, 57APG/AFG 2006-07-14 ...

Page 3

... N-channel open drain port pins, for such uses as control signal output. These pins are set to the OFF state when power is turned on. (On the TC9256APG and TC9256AFG, OT-4 can be used as a CMOS output pin by being switched with DO2.) The CMOS structure allows free use of these ports for input or output ...

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... Power supply pins (9) Note 1: Pin numbers are common to the TC9256APG, TC9256AFG, TC9257APG and TC9257AFG. Note 2: Pin names and numbers in parentheses apply to the TC9256APG and TC9256AFG. Function General-purpose I/O port input/output pin. Can be switched for use as signal input pin to measure low-frequency signal cycles ...

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... Functions and Operation Serial I/O Ports As the block diagram shows, the functions of the TC9256APG, TC9256AFG, TC9257APG and TC9257AFG are controlled by setting data in the 48 bits contained in each of the two sets of 24-bit registers. Each bit of data in these registers is transferred through the serial ports between the controller and the DATA, CLOCK and PERIOD pins ...

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... When power is turned on, the input registers are set as shown below. *1: This setting is not available on the TC9256APG and TC9256AFG. *2: The data is “0” on the TC9256APG and TC9256AFG. *3: Bit names in parentheses “( )” apply to the TC9256APG and TC9256AFG. *4: Data is undefined. *5: Set data to “0” for the TEST bit. ...

Page 7

Serial Transfer Format The serial transfer format consists of 8 address bits and 24 data bits (Figure 1). Addresses D0H to D3H are used. • Serial data transfer Serial data are transferred in sync with the clock signal. In the ...

Page 8

Crystal Oscillator Pins (XT Figure 2 shows, the clock required for internal operation is produced by connecting a crystal oscillator between capacitors. Use the crystal oscillator selection bit to select an oscillating frequency of 3.6 MHz, 4.5 ...

Page 9

Reference Counter (Reference Frequency Divider) The reference counter section consists of a crystal oscillator and a counter. A crystal oscillator frequency of 3.6 MHz, 4.5 MHz, 7.2 MHz or 10.8 MHz can be selected. A maximum of 15 reference frequencies ...

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Programmable Counter The programmable counter section consists of a 1/2 prescaler, a two-modulus prescaler and a 4 bit + 12 bit programmable binary counter. 1. Setting of Programmable Counter 16 bits of divisor data and 2 bits indicating the dividing ...

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Prescaler and Programmable Counter Circuit Configuration (1) Pulse-swallow mode circuit configuration This circuit consists of a two-modulus prescaler, a 4-bit swallow counter and a 12-bit programmable counter. During FM ( (2) Circuit configuration for the direct dividing ...

Page 12

... The general-purpose counter is a 20-bit counter. It has such uses as counting AM/FM band intermediate frequencies (IF) and detecting auto-stop signals during auto-search tuning. It also features a cycle measurement function for such uses as measuring low-frequency pilot signal cycles. The TC9256APG and TC9256AFG do not have the cycle measurement function (SC 1 ...

Page 13

... Bits marked with an asterisk “(*)” are don’t-care. Note2: Bit names in parentheses “( )” apply to the TC9256APG and TC9256AFG. Note3: Bits marked with (*1) cannot be set on the TC9256APG and TC9256AFG. (4) Bits f0 to f19.............................. The general-purpose counter results can be read in binary from bits f0 to f19 of the output register (D1H). ...

Page 14

General-Purpose Counter Circuit Configuration The general-purpose counter section consists of input amps, a gate time control circuit and a 20-bit binary counter. 3. General-Purpose Counter Measurement Timing Frequency Measurement Timing Chart < = 0.25 ( µ s), 0 < ...

Page 15

... The data set in bits O1to O4 of the input register (D2H) are output in parallel from their corresponding dedicated output port pins OT-1to OT-4. The TC9256APG and TC9256AFG do not have the dedicated output port OT-4, but setting the input register (D2H) CLK (O4C) bit to “1” converts pin DO2 into an output port OT-4 (configured for CMOS output) ...

Page 16

... I/O-5 is used as an I/O port. Note2: Bit names in parentheses “( )” apply to the TC9256APG and TC9256AFG. Note3: Bits marked with (*1) cannot be set on the TC9256APG and TC9256AFG. data from the output register (D3H). 16 TC9256, 57APG/AFG ...

Page 17

... TC9256APG and TC9256AFG • Setting data for output ports (3) Output register ......................... Data set in bits C5, C6 and M7to M9 of the input register (D2H) can be read as serial data C5, C6 and M7to M9 from the output register (D3H). Data input in parallel from pins I/O-5 to I/O-9 can be read as serial data from the output register (D3H) ...

Page 18

... I/O port input. The output state of general-purpose output ports is set to high impedance (N-channel open drain output = off). Note5: On TC9256APG and TC9256AFG, pins I/O-5 and I/O-6 also serve as general-purpose counter input pins. Therefore, bits IF1 and IF2 of input register 2 must be set to “0” when these pins are used as I/O ports. ...

Page 19

... The filter circuit shown above is just one example. Actual circuits should be designed based on the band composition and the properties desired from the system. Note: On the TC9256APG and TC9256AFG, pin DO2 can be switched for use as pin OT-4. TC9256, 57APG/AFG Figure 7 Figure 9 Typical Active Low-Pass ...

Page 20

Lock Detection Bits The lock detection bits detect locked states in the PLL system. These systems have an unlock detection bit (unlock bit), which is used to detect, using the reference frequency cycle, the phase difference between the reference frequency ...

Page 21

Note: The asterisk “(*)” indicates an error state of over 180° phase difference relative to the reference frequency. 2. Phase Error Detection Bits (PE1to PE3) The unlock bit detects, using the reference frequency cycle, the phase difference between the reference ...

Page 22

The following is a typical lock detection operation. It shows the operation flow from locked state to frequency change with a phase error greater than ±4.95 µs and less than ±6.05 µs. TC9256, 57APG/AFG Figure 11 22 2006-07-14 ...

Page 23

... The system clock output marked with an asterisk “(*)” refers to output of the crystal oscillator frequencies listed below. Crystal Oscillator (MHz) 10.8 7.2 3.6 4.5 Note2: Bit names in parentheses “( )” apply to the TC9256APG and TC9256AFG. TC9256, 57APG/AFG I/O-5/CLK pin on the TC9257APG and TC9257AFG, and the OT-4/DO2 pin on the TC9256APG and TC9256AFG. System Clock (kHz) Duty (%) 600 ...

Page 24

... On the TC9256APG and TC9256AFG, the O4C bit controls switching of the DO2 pin and OT-4 pin. • When bits the input register (D0H) are all set to “1” (standby mode) • When one of bits the input register (D0H) is set to “0” (not standby mode) 2. DOHZ Bit ................................................. Controls the DO2 pin output state. 3. TEST Bit .................................................. Data should normally be set to “ ...

Page 25

Absolute Maximum Ratings Characteristic Supply voltage Input voltage N-ch open-drain OFF withstanding voltage Power dissipation Operating temperature Storage temperature ( ): Flat package (unless otherwise specified −40 to 85°C, V Electrical Characteristics Characteristic Operating power supply voltage Operating ...

Page 26

Operating input amplitude range Characteristic Symbol (HF (LF IN1 IN2 OT1 to OT4 N-ch open drain Characteristic Symbol Output ...

Page 27

DO1, DO2 Characteristic Symbol “H” level Input current “L” level Tristate lead current XT Characteristic Symbol “H” level Output current “L” level Input feedback resistance Characteristic Symbol Input feedback resistance Test Test Condition Circuit = 4 OH3 ...

Page 28

TC9256, 57APG/AFG 28 2006-07-14 ...

Page 29

Application Circuit (Sample circuit containing TC9257APG and TC9257AFG) TC9256, 57APG/AFG 29 2006-07-14 ...

Page 30

Package Dimensions Weight: 1.0 g (typ.) (Note): Palladium plate 30 TC9256, 57APG/AFG 2006-07-14 ...

Page 31

Package Dimensions Weight: 1.24 g (typ.) (Note): Palladium plate 31 TC9256, 57APG/AFG 2006-07-14 ...

Page 32

Package Dimensions P-SOP16-300-1.27A Weight: 0.16 g (typ.) (Note): Palladium plate 32 TC9256, 57APG/AFG Unit : mm 2006-07-14 ...

Page 33

Package Dimensions P-SOP20-300-1.27A Weight: 0.48 g (typ.) (Note): Palladium plate 33 TC9256, 57APG/AFG Unit : mm 2006-07-14 ...

Page 34

RESTRICTIONS ON PRODUCT USE • The information contained herein is subject to change without notice. • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to ...

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