GTL2003 Philips Semiconductors (Acquired by NXP), GTL2003 Datasheet - Page 3

• Manufacturer Part Number: GTL2003
• Manufacturer: Philips Semiconductors (Acquired by NXP)

NXP Semiconductors
6. Pinning information
GTL2003_1
Product data sheet
6.1 Pinning
6.2 Pin description
Table 3.
[1]
Symbol
GND
SREF
S1 to S8
D1 to D8
DREF
GREF
Fig 2. Pin configuration for TSSOP20
DHVQFN package die supply ground is connected to both GND pin and exposed center pad. GND pin must
be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board
level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad
on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the
printed-circuit board in the thermal pad region.
SREF
GND
S1
S2
S3
S4
S5
S6
S7
S8
10
1
2
3
4
5
6
7
8
9
Pin description
Pin
1
2
3, 4, 5, 6, 7, 8, 9, 10
18, 17, 16, 15, 14, 13, 12, 11
19
20
[1]
GTL2003PW
Rev. 01 — 27 July 2007
002aac639
20
19
18
17
16
15
14
13
12
11
GREF
DREF
D1
D2
D3
D4
D5
D6
D7
D8
Description
ground (0 V)
source of reference transistor
Port S1 to Port S8
Port D1 to Port D8
drain of reference transistor
gate of reference transistor
Fig 3. Pin configuration for DHVQFN20
8-bit bidirectional low voltage translator
index area
terminal 1
SREF
S1
S2
S3
S4
S5
S6
S7
Transparent top view
2
3
4
5
6
7
8
9
GTL2003BQ
GTL2003
© NXP B.V. 2007. All rights reserved.
19
18
17
16
15
14
13
12
002aac640
DREF
D1
D2
D3
D4
D5
D6
D7
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