lc898093 Sanyo Semiconductor Corporation, lc898093 Datasheet
lc898093
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lc898093 Summary of contents
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... C2 flag, subcode, and other data in a single operation) • Multi-transfer function (Function for automatically transferring multiple block to the host in a single operation) • CAV audio functions • Supports Ultra DMA modes 0, 1, and 2. Package Dimensions unit: mm 3210-SQFP208 [LC898093] 30.6 28.0 156 105 157 104 208 ...
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... I OZ (14), (15) Pull-up resistance R (10) UP Pull-up resistance R (4), (5) UP Pull-up resistance R (9), (13), (14) UP Pull-up resistance R (15) UP The applicable pin groups are listed on the following page. LC898093 = 0 V Symbol Conditions 5 max Ta 25° max Ta 25° 25° ...
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... DD0 to DD15 (8) · · · · · · BIDATA, BICLK (14) · · · · · DASP, PDIAG Note: The XTAL0 pin is not specified in the DC characteristics. The pull-up and pull-down resistors on pins (9), (13), (14), and (15) are disabled after a reset. LC898093 No. 6495-3/14 ...
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... PD1 C3 R6 VCNT1 C4 R1 The analog V and V pins (pins 52, 53, 90, and 91) must be completely isolated from the logic system power supply DD SS and must not be influenced by fluctuations in the logic system power supply. LC898093 Symbol Value (typ 200 C1 0.1 µ C2 0.1 µ ...
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... Sub-code ECC Address generator CAV-Audio De-scramble & Buffering Address generator ECC & EDC Address generator IDE I/F Block based HISIDE Data output input I/F Address generator Microcontroller RAM access Address generator LC898093 *11 *10 *13 DAC Each Block Bus control signal External Bus *8 Arbiter & Buffer *9 ...
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... Write strategy signal control input 38 SSP2 O Servo sampling pulse output 39 SSP1 O Servo sampling pulse output 40 RAPC O Laser control sampling pulse output 41 WAPC O Laser control sampling pulse output 42 H11T0 O Running OPC sampling pulse LC898093 Pin type I Input B Bidirectional pin O Output P Power supply Pin function ) ...
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... Charge pump output Analog system power supply (3 Analog system ground ( TEST1 I Test pin. This pin must be tied RESET I Reset input 90 XTALCK0 I Crystal oscillator circuit input (33.8688 MHz) LC898093 Pin function ) Continued on next page. No. 6495-7/14 ...
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... VREF I VREF input 132 AD1 I AD input 133 V P Analog system ground (V SS 134 DA0 O DA output 135 DA1 O DA output 136 DA2 O DA output 137 TDO O Tracking output LC898093 Pin function ) Continued on next page. No. 6495-8/14 ...
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... DMARQ O 175 DD15 B 176 DD0 B 177 DD14 B IDE interface signals 178 DD1 B 179 DD13 B 180 DD2 B 181 V P Digital system ground (V SS 182 DD12 B 183 DD3 B IDE interface signals 184 DD11 B LC898093 Pin function ) Continued on next page. No. 6495-9/14 ...
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... DMARQ (input) Drive request signal used during DMA transfers. HINTRQ (output) Drive interrupt request signal to the host. IOCS16 (output) Signal asserted by the drive when the drive supports 16-bit transfers. This signal is not asserted during DMA transfers. LC898093 Pin function ) No. 6495-10/14 ...
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... Buffer RAM write outputs. Connect these to the corresponding pins. If 2-CAS type DRAMs are used, UWE must be connected. (Leave LWE open.) 1. Analog Interface Pins RREC (input) Optical discrimination input. FE (input) Focus error signal input. TE (input) Tracking error signal input. VREF (input) Input for the servo system reference voltage. LC898093 No. 6495-11/14 ...
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... PCKISTP (input) EFM reproduction PLL phase comparator charge pump bias resistor connection. RPO (output) P/N balance adjustment. OPP (input) P/N balance adjustment. PCK2 (output) EFM reproduction bit clock output. 4. Jitter Discrimination Pins JITIN (input) Jitter discrimination input. JITC (output) Jitter output. LC898093 No. 6495-12/14 ...
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... Outputs the result of the ATIP decoder CRC check. (For monitoring) <Other Pins> RESET (input) The LC898093 reset input. A low level input resets the LC898093. This pin must be held low for at least 1 µs when power is first applied. TEST4 to TEST0 (input) Test inputs. These pins must be connected to ground. ...
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