saa5284 NXP Semiconductors, saa5284 Datasheet - Page 13

• Manufacturer Part Number: saa5284
• Description: Multimedia Video Data Acquisition Circuit
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 4 Intel-mode interface write cycle timing (12 MHz clock)
Note
1. Legacy AT bus PCs may not satisfy this requirement as they are not ISA compatible. An application fix is available
1998 Feb 05
handbook, full pagewidth
SYMBOL
Multimedia video data acquisition circuit
(1) Event A occurs when WR + CS0 + CS1 = 0 (boolean).
(2) Event B occurs when WR + CS0 + CS1 = 1 (boolean).
in the “SAA5284 Users Guide” .
t
t
t
t
t
t
t
t
0
1
2
3
4
5
6
7
CS0 or CS1
D7 to D0
A2 to A0
RDY
WR
minimum cycle time
address set-up time
address hold time
data set-up time, note 1
data hold time
RDY set-up time
RDY LOW time
event B to next event A time
t 1
Fig.4 Intel mode interface write cycle timing.
DESCRIPTION
t 3
A
(1)
t 5
valid address
valid data
t 6
13
t 0
B
(2)
t 4
t 2
333
0
0
0
0
83
83
83
MIN.
t 7
833
170
530
Objective specification
MAX.
SAA5284
MGK146
UNIT
ns
ns
ns
ns
ns
ns
ns
ns