saa5284 NXP Semiconductors, saa5284 Datasheet - Page 12

• Manufacturer Part Number: saa5284
• Description: Multimedia Video Data Acquisition Circuit
• Manufacturer: NXP Semiconductors

Philips Semiconductors
12 TIMING
Table 3 Intel-mode interface read cycle timing (12 MHz clock)
1998 Feb 05
handbook, full pagewidth
SYMBOL
Multimedia video data acquisition circuit
(1) Event A occurs when RD + CS0 + CS1 = 0 (boolean).
(2) Event B occurs when RD + CS0 + CS1 = 1 (boolean).
t
t
t
t
t
t
t
t
CS0 or CS1
0
1
2
3
4
5
6
7
D7 to D0
A2 to A0
RDY
RD
minimum cycle time
address set-up time before event A
address hold time after event B
data settling time
data hold time after event B
time from event A until RDY goes LOW
RDY LOW time
event B to next event A time
3-state
t 1
Fig.3 Intel mode interface read cycle timing.
A
DESCRIPTION
(1)
t 5
t 3
valid address
t 6
12
valid data
t 0
B
(2)
t 4
t 2
333
0
0
88
0
83
83
83
MIN.
t 7
3-state
833
712
170
530
Objective specification
MAX.
SAA5284
MGK145
UNIT
ns
ns
ns
ns
ns
ns
ns
ns