mt9v125 aptina, mt9v125 Datasheet - Page 5

• Manufacturer Part Number: mt9v125
• Description: 1/4-inch System-on-a-chip Soc Vga Ntsc And Pal Cmos Digital Image Sensor
• Manufacturer: aptina

Typical Connections
Figure 4:
PDF: 09005aef829db8a0/Source: 09005aef829dbfdb
MT9V125_LDS_2.fm - Rev. A 4/07 EN
Typical Configuration (without use of overlay)
Notes: 1. MT9V125 STANDBY can be connected directly to the customer’s ASIC controller or to D
Figure 4 shows a detailed MT9V125 device configuration. For low-noise operation, the
MT9V125 requires separate analog and digital power supplies. Incoming digital and ana-
log ground conductors can be tied together next to the die.
Power supply voltages V
the pixel array) should be decoupled separately.
The MT9V125 requires a single external voltage supply level.
2. A 1.5KΩ resistor value is recommended, but may be greater for slower (for example,
3. LVDS_ENABLE must be tied HIGH if LVDS is to be used.
4. Pull down DAC_REF with a 2.8KΩ resistor for 1.0V peak-to-peak video output. For a 1.4V
5. V
Serial Interface
depending on the controller’s capability.
100Kb) two-wire speed.
peak-to-peak video output, change the resistor to 2.4KΩ.
STANDBY from
AA
or Digital GND
Master Clock
Two-Wire
and VAAPIX must be tied to the same potential for proper operation.
Controller
10µF
0.1µF
MT9V125: 1/4-Inch VGA SOC Digital Image Sensor
AA
D
V
GND
DD
(the primary analog voltage) and VAAPIX (the main voltage to
S
STANDBY
EXTCLK
S
SCLK
LVDS_ENABLE
DIN_CLK
NTSC_PAL_SELECT
PEDESTAL
D
HORIZ_FLIP
RSVD
RESET_BAR
Power
ADDR
DATA
IN
V
V
1µF
[7:0]
DD
DD
5
V
V
Power
1
DD
DD
DAC
DAC
D
D
GND
GND
0.1µF
Micron Technology, Inc., reserves the right to change products or specifications without notice.
V
V
Power
VAAPIX
DD
DD
A
A
A
GND
PLL
GND
GND
PLL
V
FRAME_VALID
D
AA
1µF
OUT
LINE_VALID
LVDS_NEG
V
Power
LVDS_POS
DAC_NEG
D
AA AND
DAC_POS
DAC_REF
_LSB[1:0]
OUT
VAAPIX
PIXCLK
[7:0]
VAAPIX
0.1µF
A
5
GND
Typical Connections
©2007 Micron Technology, Inc. All rights reserved.
1µF
75Ω Terminated Receiver
GND
,