m464s0824dt1 Samsung Semiconductor, Inc., m464s0824dt1 Datasheet - Page 6

• Manufacturer Part Number: m464s0824dt1
• Description: 8mx64 Sdram Sodimm Based 4mx16, 4banks, Refresh, 3.3v Synchronous Drams With
• Manufacturer: Samsung Semiconductor, Inc.

M464S0824DT1
AC OPERATING TEST CONDITIONS
Notes :
OPERATING AC PARAMETER
(AC operating conditions unless otherwise noted)
AC input levels (Vih/Vil)
Input timing measurement reference level
Input rise and fall time
Output timing measurement reference level
Output load condition
Row active to row active delay
RAS to CAS delay
Row precharge time
Row active time
Row cycle time
Last data in to row precharge
Last data in to Active delay
Last data in to new col. address delay
Last data in to burst stop
Col. address to col. address delay
Number of valid output data
Output
1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
5. For -1H/ 1L, tRDL=1CLK and tDAL=1CLK+20ns is also supported .
(Fig. 1) DC output load circuit
SAMSUNG recommends tRDL=2CLK and tDAL=2CLK + 20ns.
and then rounding off to the next higher integer.
870
Parameter
Parameter
3.3V
1200
50pF
V
V
OH
OL
CAS latency=3
CAS latency=2
(DC) = 0.4V, I
(DC) = 2.4V, I
(V
DD
= 3.3V
t
t
t
t
t
t
t
t
t
RAS
RRD
RCD
t
CCD
Symbol
t
RAS
RDL
DAL
CDL
BDL
RP
RC
OL
OH
0.3V, T
(min)
(min)
(max)
(min)
(min)
(min)
(min)
(min)
(min)
(min)
(min)
= 2mA
= -2mA
A
= 0 to 70 C)
See Fig. 2
tr/tf = 1/1
2.4/0.4
Value
1.4
1.4
Output
-1H
20
20
20
50
70
2 CLK + 20 ns
Version
100
2
1
1
1
2
1
(Fig. 2) AC output load circuit
-1L
20
20
20
50
70
Z0 = 50
Rev. 0.0 Jun. 1999
PC100 SODIMM
Unit
CLK
CLK
CLK
CLK
ns
ns
ns
ns
us
ns
ea
-
Vtt = 1.4V
Unit
50
ns
50pF
V
V
V
Note
2,5
1
1
1
1
1
5
2
2
3
4