k4s560832h Samsung Semiconductor, Inc., k4s560832h Datasheet
k4s560832h
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k4s560832h Summary of contents
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... SDRAM 256Mb H-die (x4, x8, x16) 256Mb H-die SDRAM Specification INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS " ...
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... SDRAM 256Mb H-die (x4, x8, x16) Revision History Revision 0.0 (May. 2005) - First release. Revision 1.0 (October. 2005) - Final release. CMOS SDRAM Rev. 1.0 October 2005 ...
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... RoHS compliant for Pb-free Package GENERAL DESCRIPTION The K4S560432H / K4S560832H / K4S561632H is 268,435,456 bits synchronous high data rate Dynamic RAM organized 16,777,216 words by 4 bits / 4 x 8,388,608 words by 8bits / 4 x 4,194,304 words by 16bits, fabricated with SAMSUNG's high perfor- mance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle ...
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... SDRAM 256Mb H-die (x4, x8, x16) Package Physical Dimension #54 #1 0.10 MAX 0.004 0. 0.028 #28 #27 22.62 MAX 0.891 22.22 ± 0.10 0.21 ± 0.004 0.875 0.008 +0.10 0.30 0.80 -0.05 +0.004 0.0315 0.012 -0.002 54Pin TSOP(II) Package Dimension CMOS SDRAM 0~8°C 0.25 TYP 0.010 +0.075 0.125 -0.035 +0.003 0.005 -0.001 ± 0.05 1.00 ± 0.10 1 ...
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... SDRAM 256Mb H-die (x4, x8, x16) FUNCTIONAL BLOCK DIAGRAM Bank Select CLK ADD LCKE LRAS LCBR CLK CKE * Samsung Electronics reserves the right to change products or specification without notice. Data Input Register 16M 16M 16M ...
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... SDRAM 256Mb H-die (x4, x8, x16) PIN CONFIGURATION (Top view) x16 DQ0 DQ0 V V DDQ DDQ DQ1 N.C DQ2 DQ1 V V SSQ SSQ DQ3 N.C DQ4 DQ2 V V DDQ DDQ DQ5 N.C DQ6 DQ3 V V SSQ SSQ DQ7 N LDQM N CAS ...
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... SDRAM 256Mb H-die (x4, x8, x16) ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to Vss Voltage on V supply relative to Vss DD Storage temperature Power dissipation Short circuit current Note : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to recommended operating condition. ...
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... SDRAM 256Mb H-die (x4, x8, x16) DC CHARACTERISTICS (x4, x8) (Recommended operating condition unless otherwise noted, T Parameter Symbol Operating current I CC1 (One bank active CC2 Precharge standby current in PS CKE & CLK ≤ V power-down mode I CC2 I N CC2 Precharge standby current in non power-down mode ...
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... SDRAM 256Mb H-die (x4, x8, x16) DC CHARACTERISTICS (x16) (Recommended operating condition unless otherwise noted, T Parameter Symbol Operating current I CC1 (One bank active CC2 Precharge standby current in power-down mode I PS CC2 I N CC2 Precharge standby current in non power-down mode I NS CC2 I P CC3 ...
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... SDRAM 256Mb H-die (x4, x8, x16) AC OPERATING TEST CONDITIONS Parameter AC input levels (Vih/Vil) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition 3.3V 1200Ω Output 50pF 870Ω (Fig output load circuit ...
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... SDRAM 256Mb H-die (x4, x8, x16) AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter CLK cycle time CLK to valid output delay Output data hold time CLK high pulse width CLK low pulse width Input setup time Input hold time CLK to output in Low-Z CLK to output in Hi-Z Notes : 1 ...
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... SDRAM 256Mb H-die (x4, x8, x16) IBIS SPECIFICATION I Characteristics (Pull-up) OH 100MHz Voltage 133MHz Min (V) I (mA) 3.45 3.3 3.0 0.0 2.6 -21.1 2.4 -34.1 2.0 -58.7 1.8 -67.3 1.65 -73.0 1.5 -77.9 1.4 -80.8 1.0 -88.6 0.0 -93.0 I Characteristics (Pull-down) OL 100MHz Voltage 133MHz Min (V) I (mA) 0.0 0.0 0.4 27.5 0.65 41.8 0.85 51.6 1.0 58.0 1.4 70.7 1.5 72.9 1.65 75.4 1.8 77.0 1.95 77.6 3.0 80.3 3.45 81.4 0 0.5 0 100MHz 133MHz Max -100 I (mA) -2.4 -200 -27.3 -74.1 -129.2 -300 -153.3 -197.0 -400 -226.2 -248.0 -269.7 -500 -284.3 -344.5 -600 -502 ...
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... SDRAM 256Mb H-die (x4, x8, x16) V Clamp @ CLK, CKE, CS, DQM & (V) I (mA) DD 0.0 0.0 0.2 0.0 0.4 0.0 0.6 0.0 0.7 0.0 0.8 0.0 0.9 0.0 1.0 0.23 1.2 1.34 1.4 3.02 1.6 5.06 1.8 7.35 2.0 9.83 2.2 12.48 2.4 15.30 2.6 18.31 V Clamp @ CLK, CKE, CS, DQM & (V) I (mA) SS -2.6 -57.23 -2.4 -45.77 -2.2 -38.26 -2.0 -31.22 -1.8 -24.58 -1.6 -18.37 -1.4 -12.56 -1.2 -7.57 -1.0 -3.37 -0.9 -1.75 -0.8 -0.58 -0.7 -0.05 -0.6 0.0 -0.4 0.0 -0.2 0.0 0.0 0.0 CMOS SDRAM Minimum V clamp current DD (Referenced Voltage I (mA) Minimum V clamp current -10 ...
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... MRS can be issued only at all banks precharge state. A new command can be issued after 2 CLK cycles of MRS. 3. Auto refresh functions are as same as CBR refresh of DRAM. The automatical precharge without row precharge command is meant by "Auto". Auto/self refresh can be issued only at all banks precharge state. ...