k4s64323lf-dg15 Samsung Semiconductor, Inc., k4s64323lf-dg15 Datasheet - Page 2

• Manufacturer Part Number: k4s64323lf-dg15
• Description: 2mx32 Mobile Sdram 90fbga
• Manufacturer: Samsung Semiconductor, Inc.

K4S64323LF-S(D)G/S
512K x 32Bit x 4 Banks Mobile SDRAM
FEATURES
• 2.5V Power Supply
• LVCMOS compatible with multiplexed address.
• Four banks operation.
• MRS cycle with address key programs.
• EMRS cycle with address key programs.
• All inputs are sampled at the positive going edge of the system
• Burst read single-bit write operation.
• Special Function Support.
• DQM for masking.
• Auto & self refresh.
• 64ms refresh period (4K cycle).
• Extended temperature range : (-25 C to 85 C).
• 90balls FBGA( -SXXX -Pb, -DXXX -Pb Free).
FUNCTIONAL BLOCK DIAGRAM
clock .
-. Burst length (1, 2, 4, 8 & Full page).
-. CAS latency (1 & 2 & 3).
-. Burst type (Sequential & Interleave).
-. PASR (Partial Array Self Refresh).
-. TCSR (Temperature Compensated Self Refresh).
ADD
CLK
LCKE
CLK
.
* Samsung Electronics reserves the right to change products or specification without notice.
LRAS
CKE
Bank Select
LCBR
CS
LWE
RAS
Timing Register
LCAS
CAS
GENERAL DESCRIPTION
Dynamic RAM organized as 4 x 524,288 words by 32 bits, fabri-
cated with SAMSUNG s high performance CMOS technology.
Synchronous design allows precise cycle control with the use of
system clock. I/O transactions are possible on every clock cycle.
Range of operating frequencies, programmable burst lengths and
programmable latencies allow the same device to be useful for a
variety of high bandwidth and high performance memory system
applications.
ORDERING INFORMATION
-S(D)S ; Super Low Power, Operating Temp : -25 C~85 C.
-S(D)G ; Low Power, Operating Temp : -25 C~85 C.
1. In case of 55MHz Frequency, CL1 can be supported.
2. In case of 40MHz Frequency, CL1 can be supported.
3. In case of 33MHz Frequency, CL1 can be supported.
The K4S64323LF is 67,108,864 bits synchronous high data rate
Notes :
K4S64323LF-S(D)G/S1H 105MHz(CL=2)
K4S64323LF-S(D)G/S75
K4S64323LF-S(D)G/S1L
K4S64323LF-S(D)G/S15
Latency & Burst Length
Programming Register
WE
Data Input Register
Column Decoder
512K x 32
512K x 32
512K x 32
512K x 32
Part No.
DQM
LWCBR
133MHz(CL=3)
105MHz(CL=2)
105MHz(CL=3)
66MHz(CL=2/3)
Max Freq.
CMOS SDRAM
Rev. 1.5 Dec 2002
LDQM
*1
*2
*3
Interface
LVCMOS
LWE
LDQM
DQi
(Pb Free)
Package
90FBGA
Pb