k4s643232e-tl70 Samsung Semiconductor, Inc., k4s643232e-tl70 Datasheet - Page 9

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k4s643232e-tl70

Manufacturer Part Number
k4s643232e-tl70
Description
Sdram 512k 32bit Banks Synchronous Dram Lvttl
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
K4S643232E
Note :
AC CHARACTERISTICS
CLK cycle time
CLK to valid
output delay
Output data hold time
CLK high pulse
width
CLK low
pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output
in Hi-Z
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf)=1ns.
Row active to row active delay t
RAS to CAS delay
Row precharge time
Row active time
Row cycle time
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
Parameter
Parameter
CAS Latency=3
CAS Latency=2
CAS Latency=3
CAS Latency=2
CAS Latency=3
CAS Latency=2
CAS Latency=3
CAS Latency=2
CAS Latency=3
CAS Latency=2
CAS latency=3
CAS latency=2
(AC operating conditions unless otherwise noted)
t
t
t
t
t
RRD(min)
RCD(min)
RP(min)
RAS(min)
RAS(max)
RC
Symbol
Symbol
(
t
t
t
min
t
t
t
SAC
t
t
t
SHZ
SLZ
OH
CC
CH
SH
CL
SS
)
1.75
1.75
Min
4.5
1.2
2.5
10
2
3
3
1
1
-
-
-
-
40.5
58.5
-45
18
18
9
-45
1000
Max
4.0
4.0
6
6
-
-
-
-
-
-
-
-
-
Min
-50
1.5
2.5
- 9 -
10
10
15
15
40
55
5
2
2
3
2
3
1
1
-
-
-
-
-50
1000
Max
4.5
4.5
6
6
-
-
-
-
-
-
-
-
-
Version
16.5
16.5
38.5
100
-55
11
55
Min
5.5
1.5
2.5
10
2
2
3
2
3
1
1
-
-
-
-
-55
1000
Max
5.0
5.0
6
6
-
-
-
-
-
-
-
-
-
-60
12
18
18
42
60
Min
2.5
2.5
1.5
2.5
10
6
2
3
3
1
1
-
-
-
-
-60
-70
1000
14
20
20
49
70
Max
5.5
5.5
6
6
-
-
-
-
-
-
-
-
-
1.75
Min
CMOS SDRAM
Rev. 1.3 (Oct. 2001)
2.5
10
Unit
7
2
3
3
3
3
1
1
-
-
-
-
ns
ns
ns
ns
us
ns
-70
1000
Max
5.5
5.5
6
6
-
-
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
1, 2
1
2
3
3
3
3
2
-

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