k4s643232e-tl70 Samsung Semiconductor, Inc., k4s643232e-tl70 Datasheet - Page 3

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k4s643232e-tl70

Manufacturer Part Number
k4s643232e-tl70
Description
Sdram 512k 32bit Banks Synchronous Dram Lvttl
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
K4S643232E
512K x 32Bit x 4 Banks Synchronous DRAM
FEATURES
• 3.3V power supply
• LVTTL compatible with multiplexed address
• Four banks operation
• MRS cycle with address key programs
• All inputs are sampled at the positive going edge of the system
• Burst read single-bit write operation
• DQM for masking
• Auto & self refresh
• 15.6us refresh duty cycle
FUNCTIONAL BLOCK DIAGRAM
clock
-. Burst length (1, 2, 4, 8 & Full page)
-. CAS latency (2 & 3)
-. Burst type (Sequential & Interleave)
ADD
CLK
LCKE
CLK
LRAS
CKE
Bank Select
LCBR
CS
LWE
RAS
Timing Register
LCAS
CAS
- 3 -
ORDERING INFORMATION
K4S643232E-TC/L45
K4S643232E-TC/L50
K4S643232E-TC/L55
K4S643232E-TC/L60
K4S643232E-TC/L70
Latency & Burst Length
GENERAL DESCRIPTION
rate Dynamic RAM organized as 4 x 524,288 words by 32 bits,
fabricated with SAMSUNG s high performance CMOS technol-
ogy. Synchronous design allows precise cycle control with the
use of system clock. I/O transactions are possible on every
clock cycle. Range of operating frequencies, programmable
burst length and programmable latencies allow the same device
to be useful for a variety of high bandwidth, high performance
memory system applications.
Programming Register
WE
The K4S643232E is 67,108,864 bits synchronous high data
Data Input Register
Column Decoder
512K x 32
512K x 32
512K x 32
512K x 32
Part NO.
DQM
LWCBR
*
Samsung Electronics reserves the right to
change products or specification without
notice.
Max Freq.
222MHz
200MHz
183MHz
166MHz
143MHz
CMOS SDRAM
Rev. 1.3 (Oct. 2001)
LDQM
Interface
LVTTL
LWE
LDQM
DQi
Package
TSOP(II)
86

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