k4h560838c Samsung Semiconductor, Inc., k4h560838c Datasheet - Page 24

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k4h560838c

Manufacturer Part Number
k4h560838c
Description
Ddr Sdram Specification Version 0.6
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
256Mb C-die(x4/8) DDR SDRAM
3.3.6 Write Interrupted by a Write
tion that the interval that separates the commands must be at least one clock cycle. When the previous burst
is interrupted, the remaining addresses are overridden by the new address and data will be written into the
device until the programmed burst length is satisfied.
A Burst Write can be interrupted before completion of the burst by a new Write command, with the only restric-
< Burst Length=4 >
Command
DQS
D Q s
CK
CK
NOP
0
Figure 14. Write interrupted by a write timing
WRITE A
1
1t
CK
WRITE b
Din A
0
2
Din A
- 24 -
1
Din B
NOP
0
3
Din B
1
Din B
NOP
2
4
Din B
3
NOP
5
REV. 0.7 Jan. 31. 2002
NOP
6
NOP
7
NOP
8

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