zic2410 California Eastern Laboratories, zic2410 Datasheet - Page 60

• Manufacturer Part Number: zic2410
• Description: Single-chip Solution, Compliant With Zigbee
• Manufacturer: California Eastern Laboratories

ZIC2410 Datasheet
When the data is received from the PHY block, the CRC information is checked to verify data
integrity.
When the AUTO_CRC control bit of the MACCTRL (0x2191) register is set to ‘1’, CRC
information is verified by the RX CRC block automatically. To check the result, refer to the
CRC_OK field of the MACSTS (0x2180) register. When the value of the CRC_OK field is set to
‘1’, there is no problem with CRC Information. When the AUTO_CRC control bit of the
MACCTRL (0x2191) register is not set to ‘1’, the CRC information should be verified by the
software.
When a packet reception is completed in the PHY block, a PHY interrupt is sent to the MCU.
In addition, when decryption operation is completed, an AES interrupt is sent to the MCU.
1.8.2 TRANSMIT MODE
To transmit the data from a higher layer (MCU) to the PHY block, the device stores the data in
the TX FIFO of the MAC block. When the MCU writes data in the MTFCPUSH (0x2000)
register, data is stored in TX FIFO of MAC. The size of the TX FIFO is 256 byte and it is
implemented by a Circular FIFO with a Write Pointer and a Read Pointer. Since each data in
the TX FIFO is mapped to the memory area in the MCU, it can be written or read directly by the
MCU.
The data stored in the TX FIFO can be encrypted by the PCMD1 (0x2201) register or is
transmitted to the PHY block by the PCMD0 (0x2200) register. The TX Controller controls the
process described above. Data encryption is implemented by the AES-128 algorithm, which
supports CCM* mode by ZigBee and CTR/CBC-MAC/CCM mode by IEEE 802.15.4. The data
length which is to be transmitted is stored in the LSB of each frame by the software when the
frame data is stored in the TX FIFO by the MCU. When the data in the TX FIFO is encrypted,
the data length is modified and then stored by the hardware again.
When transmitting the data in the TX FIFO, the CRC operation is processed to verify data
integrity. When the AUTO_CRC control bit of the MACCTRL (0x2191) register is set to ‘1’, CRC
information is generated by TX CRC block automatically. Otherwise, the CRC operation should
be operated by software.
When data encryption is completed, an AES interrupt is sent to the MCU. When the data
transmission to the PHY block is completed, a PHY interrupt is sent to the MCU.
1.8.3 DATA ENCRYPTION AND DECRYPTION
Data encryption or decryption is done by the security controller block. Security Controller
consists of the block for processing encryption /decryption operation and the block for
controlling it.
In order to implement CCM* mode by ZigBee and CTR/CBC-MAC/CCM mode by IEEE
802.15.4, a 128-bit key value and a nonce are needed. ZIC2410 can have two 128-bit key
values, KEY0 and KEY1. For encryption, the desired nonce value should be stored in the TX
Nonce and KEY0 or KEY1 should be selected for use. For decryption, the desired nonce value
should be stored in the RX Nonce and KEY0 or KEY1 should be selected for use. For more
detailed information, refer to the IEEE802.15.4 standard document.
The SAES (0x218E) register is used only for AES operation. In this case, the required data for
this operation should be stored in the SABUF register and KEY0 or KEY1 should be selected for
use.
Table 34 describes the registers for controlling the MAC TX FIFO.
Rev A
Document No. 0005-05-07-00-000
Page 60 of 119