s71gl128nb0 Meet Spansion Inc., s71gl128nb0 Datasheet - Page 48

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s71gl128nb0

Manufacturer Part Number
s71gl128nb0
Description
Stacked Multi-chip Product Mcp 512/256/128 Megabit 32/16/8 M X 16-bit Cmos 3.0 Volt-only Mirrorbittm Page-mode Flash Memory With 32 Megabit 2m X 16-bit Psram
Manufacturer
Meet Spansion Inc.
Datasheet

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48
Addresses (x16)
27h
28h
29h
2Ah
2Bh
2Ch
2Dh
2Eh
30h
31h
32h
33h
34h
35h
36h
37h
38h
39h
3Ah
3Bh
3Ch
2Fh
001Ah
0019h
0018h
0002h
0000h
0005h
0000h
0001h
00xxh
000xh
0000h
000xh
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
Data
Table 8. Device Geometry Definition
Device Size = 2
1A = 512 Mb, 19 = 256 Mb, 18 = 128 Mb
Flash Device Interface description (refer to CFI publication 100)
Max. number of byte in multi-byte write = 2
(00h = not supported)
Number of Erase Block Regions within device (01h = uniform device, 02h = boot
device)
Erase Block Region 1 Information
(refer to the CFI specification or CFI publication 100)
00FFh, 001h, 0000h, 0002h = 512 Mb
00FFh, 0000h, 0000h, 0002h = 256 Mb
007Fh, 0000h, 0000h, 0002h = 128 Mb
Erase Block Region 2 Information (refer to CFI publication 100)
Erase Block Region 3 Information (refer to CFI publication 100)
Erase Block Region 4 Information (refer to CFI publication 100)
S29GLxxxN MirrorBit
A d v a n c e
N
byte
TM
Flash Family
I n f o r m a t i o n
Description
N
S29GLxxxN_00_A4 June 14, 2004

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