zl50073 Zarlink Semiconductor, zl50073 Datasheet - Page 24

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zl50073

Manufacturer Part Number
zl50073
Description
32 K Channel Digital Switch With High Jitter Tolerance, Rate Conversion Per Group Of 4 Streams 8, 16, 32 Or 64 Mbps
Manufacturer
Zarlink Semiconductor
Datasheet

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zl50073GAG2
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8.0
The ZL50073 provides per channel code translation to be used to adapt pulse code modulation (PCM) voice or data
traffic between networks which use different encoding laws. Code translation is available in both Connection Modes
and Message Mode.
This feature is controlled by the Connection Memories. The V/D (bit 28) defines if the traffic in the channel is voice
or data. The ICL1 - 0 (bits 27 - 26) define the input coding law and the OCL1 - 0 (bits 25 - 24) define the output
coding law. The different coding options are shown in Table 4:
For voice coding options, the ITU-T G.711 A-Law and ITU-T G.711 µ-Law are the standard rules for encoding. The
A-Law without Alternate Bit Inversion (ABI) is an alternative code that does not invert the even bits (6, 4, 2, 0). The
µ-Law without Magnitude Inversion (MI) is an alternative code that does not perform Inversion of magnitude bits (6,
5, 4, 3, 2, 1, 0).
When performing data code options, No Code does not invert the bits. The Alternate Bit Inversion (ABI) option
inverts the even bits (6, 4, 2, 0) while the Inverted Alternate Bit Inversion (ABI) inverts the odd bits (7, 5, 3, 1). When
All Bits Inverted is selected, all of the bits (7, 6, 5, 4, 3, 2, 1, 0) are inverted.
The input channel and output channel encoding law are configured independently. If the output channel coding is
set to be different from the input channel, the ZL50073 performs translation between the two standards. If the input
and output encoding laws are set to the same standard, no translation occurs.
9.0
The ZL50073 has one Bit Error Rate (BER) transmitter and one BER receiver for each pair of input and output
streams, resulting in 128 transmitters connected to the output streams and 128 receivers associated with the input
streams. Each transmitter can generate a BER sequence with a pattern of 2
O.151). Each transmitter can start at any location on the stream and will last for a minimum of 1 channel to a
maximum of 1 frame time (125 µs). The BER transmitters are enabled by programming the Per Channel Function
(bit 31 - 29) to 101 (PRBS Generator mode) in the Connection Memories.
Multiple Connection Memory locations can be programmed for BER tests. These locations are not required to be
consecutive. However, when read back, the BER locations must be received in the same order that they were
transmitted. If the BER locations are not received in the same order, the BER test will produce errors.
The PRBS bit pattern is sequentially loaded into the output timeslots. An example is shown in Figure 9.
Input Coding
Per-Channel A-Law/µ-Law Translation
Bit Error Rate Tester
(ICL1- 0)
00
01
10
11
Output Coding
Table 4 - Input and Output Voice and Data Coding
(OCL1 - 0)
00
01
10
11
Zarlink Semiconductor Inc.
ZL50073
ITU-T G.711 A-Law
ITU-T G.711 µ-Law
A-Law without Alternate Bit
Inversion (ABI)
µ-Law without Magnitude
Inversion (MI)
24
Voice Coding
(V/D bit = 0)
15
-1 Pseudo-Random Code (ITU
Alternate Bit Inversion (ABI)
Inverted Alternate Bit
Inversion (ABI)
All Bits Inverted
No Code
Data Coding
(V/D bit = 1)
Data Sheet

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