mt8920bs1 Zarlink Semiconductor, mt8920bs1 Datasheet - Page 7

• Manufacturer Part Number: mt8920bs1
• Description: 32 Channels Tdm St-bus To Parallel Bus Access Circuit
• Manufacturer: Zarlink Semiconductor

Data Sheet
NOTES:
A
Bit
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
1
1
•
•
•
•
•
•
7
6
5
4
3
2
1
0
6
A
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
•
•
•
•
•
•
X is don’t care
A
IRQ2MODE
IRQ1MODE
5
6
RAMCON
(Unused)
IRQRST
IRQ2EN
IRQ1EN
is bit D
Name
ADDRESS BITS
A
A
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
•
•
•
•
•
•
6
4
4
of Control Register 1
A
0
1
0
0
0
0
0
0
0
1
1
1
1
1
1
0
1
•
•
•
•
•
•
3
Interrupt Reset. This bit, when set high, automatically clears the Interrupt Flag Register
and the Interrupt Image Register without these registers being serviced. This bit
automatically resets to zero after the register clear is completed.
RAM Configuration.
operation. D
Address Bit A6.
Interrupt Source 2 Mode Select. This bit configures the source 2 interrupt generator.
D
Interrupt Source 1 Mode Select. This bit configures the source 1 interrupt generator.
D
Interrupt Source 2 Enable. IRQ2EN = 1 enables interrupts to occur from source 2.
Interrupt Source 1 Enable. IRQ1EN = 1 enables interrupts to occur from source 1.
3
2
= 0 selects “static” interrupt mode; D
= 0 selects “static” interrupt mode; D
A
0
1
0
0
0
1
1
1
1
0
0
0
0
1
1
0
1
•
•
•
•
•
•
2
Table 3. Control Register 1 Bit Definitions
A
0
1
0
0
1
0
0
1
1
0
0
1
1
0
0
0
1
•
•
•
•
•
•
1
5
= 0 for 32 channel; D
A
0
1
0
1
0
0
1
0
1
0
1
0
1
0
1
0
1
•
•
•
•
•
•
Table 2. Mode 1 Address Map
0
This bit extends the addressing range for access to Tx1 memory.
This bit configures Tx0, Tx1 and Rx0 RAMS for 32 or 24 byte
Interrupt Channel Address 1
Interrupt Channel Address 2
Interrupt Mask Register 1
Interrupt Mask Register 2
Interrupt Vector Register
Interrupt Flag Register 1
Interrupt Flag Register 2
Match Byte Register 1
Match Byte Register 2
Control Register 1
Control Register 2
Rx0 - Channel 31
Rx0 - Channel 31
Image Register 1
Image Register 2
Rx0 - Channel 0
Rx0 - Channel 0
READ
5
= 1 for 24 channel.
•
•
•
•
•
•
Description
3
2
= 1 selects “dynamic” interrupt mode.
= 1 selects “dynamic” interrupt mode.
REGISTERS
Interrupt Channel Address 1
Interrupt Channel Address 2
Interrupt Mask Register 1
Interrupt Mask Register 2
Interrupt Vector Register
Match Byte Register 1
Match Byte Register 2
Control Register 1
Control Register 2
Tx0 - Channel 31
Tx1 - Channel 31
Tx0 - Channel 0
Tx1 - Channel 0
WRITE
MT8920B
•
•
•
-
-
-
-
•
•
•
7