wm8215 Wolfson Microelectronics plc, wm8215 Datasheet
wm8215
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wm8215 Summary of contents
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... CCD Digitiser DESCRIPTION The WM8215 is a 10-bit analogue front end/digitiser IC which processes and digitises the analogue output signals from CCD sensors or Contact Image Sensors (CIS) at pixel sample rates 60MSPS. The device includes three analogue signal processing channels each of which contains Reset Level Clamping, Correlated Double Sampling and Programmable Gain and Offset adjust functions ...
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... WM8215 DESCRIPTION .......................................................................................................1 FEATURES.............................................................................................................1 APPLICATIONS .....................................................................................................1 BLOCK DIAGRAM .................................................................................................1 TABLE OF CONTENTS .........................................................................................2 PIN CONFIGURATION...........................................................................................3 ORDERING INFORMATION ..................................................................................3 PIN DESCRIPTION ................................................................................................4 ABSOLUTE MAXIMUM RATINGS.........................................................................5 RECOMMENDED OPERATING CONDITIONS .....................................................5 THERMAL PERFORMANCE .................................................................................5 ELECTRICAL CHARACTERISTICS ......................................................................6 INPUT VIDEO SAMPLING ............................................................................................ 8 SERIAL INTERFACE................................................................................................... 10 INTERNAL POWER ON RESET CIRCUIT ..........................................................11 DEVICE DESCRIPTION.......................................................................................13 INTRODUCTION ......................................................................................................... 13 INPUT SAMPLING ...................................................................................................... 13 RESET LEVEL CLAMPING (RLC)............................................................................... 14 CDS/NON-CDS PROCESSING ...
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... WM8215 PIN CONFIGURATION ORDERING INFORMATION TEMPERATURE DEVICE RANGE WM8215SEFL WM8215SEFL Note: Reel quantity = 3,500 w PACKAGE 32-lead QFN o C (5x5x0.9mm) (Pb-free) 32-lead QFN o C (5x5x0.9mm) (Pb-free, tape and reel) Production Data MOISTURE PEAK SOLDERING SENSITIVITY TEMPERATURE LEVEL MSL1 260°C 260° ...
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... WM8215 PIN DESCRIPTION PIN NAME TYPE 1 RSMP Digital input 2 MCLK Digital input 3 DGND Supply 4 SEN Digital input 5 DVDD2 Supply 6 SDI Digital input 7 SCK Digital input connect connect 10 OP[0] Digital output 11 OP[1] Digital output 12 OP[2] Digital output 13 OP[3] Digital output 14 OP[4] Digital output 15 OP[5] Digital output ...
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... WM8215 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified. ESD Sensitive Device. This device is manufactured on a CMOS process therefore generically susceptible to damage from excessive static voltages ...
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... WM8215 ELECTRICAL CHARACTERISTICS Test Conditions AVDD = DVDD1 = DVDD2 = 3.3V, AGND = DGND = 0V, T PARAMETER Overall System Specification (including 10-bit ADC, PGA, Offset and CDS functions) Conversion rate Full-scale input voltage range (see Note 1) Input signal limits (see Note 2) Input capacitance Input switching impedance ...
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... WM8215 2. Input signal limits are the limits within which the full-scale input voltage signal must lie. Test Conditions AVDD = DVDD1 = DVDD2 = 3.3V, AGND = DGND = 0V, T PARAMETER Offset DAC, Monotonicity Guaranteed Resolution Differential non-linearity Integral non-linearity Step size Output voltage Programmable Gain Amplifier ...
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... WM8215 INPUT VIDEO SAMPLING Figure 1 Three-channel CDS Input Video Timing (CDS=1) Figure 2 Two-channel CDS Operation (CDS=1) w Production Data PD, Rev 4.2, February 2009 8 ...
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... WM8215 Figure 3 One-channel CDS Operation (CDS=1) Notes: 1. The relationship between input video signal and sample points is controlled by VSMP and RSMP. 2. When VSMP is high the input video signal is connected to the Video sampling capacitors. 3. When RSMP is high the input video signal is connected to the Reset sampling capacitors. ...
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... MCLK after VSMP falling to data output Notes: 1. Parameters are measured at 50% of the rising/falling edge 1-channel mode less than 9.5ns, the output amplitude of the WM8215 will decrease. MFVSF SERIAL INTERFACE Figure 4 Serial Interface Timing Test Conditions AVDD = DVDD1 = DVDD2 = 3.3V, AGND = DGND = 0V, T ...
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... INTERNAL POWER ON RESET CIRCUIT Figure 5 Internal Power On Reset Circuit Schematic The WM8215 includes an internal Power-On-Reset Circuit, as shown in Figure 5, which is used to reset the digital logic into a default state after power up. The POR circuit is powered from AVDD and monitors DVDD1. It asserts PORB low if AVDD or DVDD1 is below a minimum threshold. ...
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... Table 1 Typical POR Operation (typical values, not tested) Note recommended that every time power is cycled to the WM8215 a software reset is written to the software register to ensure that the contents of the control registers are at their default values before carrying out any other register writes. ...
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... These registers are programmable via a serial interface. INPUT SAMPLING The WM8215 can sample and process up to three inputs through one to three processing channels as follows: Colour Pixel-by-Pixel: The three inputs (RINP, GINP and BINP) are simultaneously sampled for each pixel and a separate channel processes each input ...
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... The WM8215 allows the user to control the RLC switch in a variety of ways as illustrated in Figure 8 This figure shows a single channel, however all 3 channels are identical, each with its own clamp switch controlled by the common CLMP signal ...
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... WM8215 start or end of a line on most image sensors). This is known as line-clamping and relies on the input capacitor to hold the DC level between clamp intervals. In non-CDS mode (CDS=0) this can be done directly by controlling the RSMP input pin to go high during the black pixels only. ...
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... DAC to compensate for offsets and then amplified by a 9-bit PGA. The gain and offset for each channel are independently programmable by writing to control bits DAC[7:0] and PGA[8:0]. The gain characteristic of the WM8215 PGA is shown in Figure 12. Figure 13 shows the maximum device input voltage that can be gained up to match the ADC full-scale input range (default=2V). ...
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... For negative-going input video signals, a black level (zero differential) output from the PGA should be offset to the top of the ADC range by setting register bits PGAFS[1:0]=10. This will give an output code of 3FF (hex) from the WM8215 for zero input. If code zero is required for zero differential input then the INVOP bit should be set. ...
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... WM8215 OVERALL SIGNAL FLOW SUMMARY Figure 15 represents the processing of the video signal through the WM8215. Figure 15 Overall Signal Flow The INPUT SAMPLING BLOCK produces an effective input voltage V difference between the input video level V difference between the input video level V optionally set via the RLC DAC. ...
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... WM8215 CALCULATING THE OUTPUT CODE FOR A GIVEN INPUT The following equations describe the processing of the video and reset level signals through the WM8215. INPUT SAMPLING BLOCK: INPUT SAMPLING AND REFERENCING If CDS = 1, (i.e. CDS operation) the previously sampled reset level, V input video CDS = 0, (non-CDS operation) the simultaneously sampled voltage on pin VRLC is subtracted instead ...
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... Often the sensor will have only a single output onto which these outputs are time multiplexed. The WM8215 can accommodate this type of input by setting the LINEBYLINE register bit high. When in this mode the green and blue input PGAs are disabled to save power. The analogue input signal should be connected to the RINP pin ...
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... WM8215 SERIAL INTERFACE: REGISTER WRITE Figure 16 shows register writing in serial mode. Three pins, SCK, SDI and SEN are used. A six-bit address (a5, 0, a3, a2, a1, a0) is clocked in through SDI, MSB first, followed by an eight-bit data word (b7, b6, b5, b4, b3, b2, b1, b0), also MSB first. Setting address bit indicates that the operation is a register write ...
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... One channel Pixel-by-Pixel Table 3 WM8215 Normal Operating Modes Note: In one channel mode the WM8215 can operate at 60MHz but DNL/INL values cannot be guaranteed. Table 4 below shows the different channel mode register settings required to operate the 8215 and 3 channel modes. MONO ...
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... WM8215 DEVICE CONFIGURATION REGISTER MAP The following table describes the location of each control bit used to determine the operation of the WM8215. ADDRESS DESCRIPTION DEF RW <a5:a0> (hex) 000001 (01h) Setup Reg 000010 (02h) Setup Reg 000011 (03h) Setup Reg 000100 (04h) Software Reset ...
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... WM8215 REGISTER MAP DESCRIPTION The following table describes the function of each of the control bits shown in Table 5 ADDRESS REGISTER BIT NO <A5:A0> 000001 Setup Register 0 (01h 5:4 7:6 w BIT DEFAULT NAME(S) Global Enable complete power down fully active (individual blocks can be disabled using individual powerdown bits – ...
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... WM8215 ADDRESS REGISTER BIT NO <A5:A0> 000010 Setup Register 1:0 (02h 7:6 000011 Setup Register 3:0 (03h 7:6 000100 Software Reset (04h) 000101 Auto-cycle (05h) Reset 000110 Setup Register 0 (06h BIT DEFAULT NAME(S) Not Used 00 Must be set to 0 INVOP 0 Digitally inverts the polarity of output data. ...
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... WM8215 ADDRESS REGISTER BIT NO <A5:A0> 1 3:2 7:4 000111 Setup Register 0 (07h 001000 Setup Register 4:0 (08h BIT DEFAULT NAME(S) ACYC 0 When LINEBYLINE = 0 this bit has no effect. When LINEBYLINE = 1 this bit determines the function of the RSMP input pin and the offset/gain register controls. ...
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... WM8215 ADDRESS REGISTER BIT NO <A5:A0> 100000 Offset DAC 7:0 (20h) (Red) 100001 Offset DAC 7:0 (21h) (Green) 100010 Offset DAC 7:0 (22h) (Blue) Offset DAC 7:0 100011 (RGB) (23h) 0 100100 PGA Gain LSB (24h) (Red) 7:1 0 100101 PGA Gain LSB (25h) (Green) 7:1 0 100110 PGA Gain LSB (26h) ...
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... WM8215 APPLICATIONS INFORMATION RECOMMENDED EXTERNAL COMPONENTS Figure 18 External Components Diagram RECOMMENDED EXTERNAL COMPONENT VALUES COMPONENT SUGGESTED REFERENCE VALUE C1 100nF C2 100nF C3 100nF C5 1µF C6 100nF C7 100nF C8 100nF C9 100nF C10 10µF C11 10µF C12 10µF Table 7 External Components Descriptions w DESCRIPTION De-coupling for DVDD1. ...
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... WM8215 PACKAGE DIMENSIONS FL: 32 PIN QFN PLASTIC PACKAGE 5 CORNER D2 TIE BAR B D2 EXPOSED 6 GROUND PADDLE BOTTOM VIEW (A3) 1 SIDE VIEW C SEATING PLANE DETAIL B Symbols Dimensions (mm) MIN NOM A 0.85 0. 0.02 A3 0.2 REF b 0.18 0.23 D 5.00 BSC D2 3.2 3.3 5.00 BSC E E2 3.2 3.3 e 0.5 BSC L 0.35 0 b(min)/ ...
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... WM8215 IMPORTANT NOTICE Wolfson Microelectronics plc (“Wolfson”) products and services are sold subject to Wolfson’s terms and conditions of sale, delivery and payment supplied at the time of order acknowledgement. Wolfson warrants performance of its products to the specifications in effect at the date of shipment. Wolfson reserves the right to make changes to its products and specifications or to discontinue any product or service without notice ...