ak4140 AKM Semiconductor, Inc., ak4140 Datasheet - Page 32

• Manufacturer Part Number: ak4140
• Description: Digital Btsc Decoder
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
ACKNOWLEDGE is a software convention used to indicate successful data transfers. The transmitting device will
release the SDA line (HIGH) after transmitting eight bits. The receiver must pull down the SDA line during the
acknowledge clock pulse so that that it remains stable “L” during “H” period of this clock pulse. The AK4140 will
generates an acknowledge after each byte has been received.
In the read mode, the slave, the AK4140 will transmit eight bits of data, release the SDA line and monitor the line for an
acknowledge. If an acknowledge is detected and no STOP condition is generated by the master, the slave will continue to
transmit data. If an acknowledge is not detected, the slave will terminate further data transmissions and await the STOP
condition.
The first byte, which includes seven bits of slave address and one bit of R/W bit, is sent after the START condition. If the
transmitted slave address matches an address for one of the device, the receiver who has been addressed pulls down the
SDA line.
The most significant five bits of the slave address are fixed as “10000”. The next two bits are CAD1 and CAD0 (device
address bits). These two bits identify the specific device on the bus. The hard-wired input pins (CAD1 pin and CAD0 pin)
set them. The eighth bit (LSB) of the first byte (R/W bit) defines whether the master requests a write or read condition. A
“1” indicates that the read operation is to be executed. A “0” indicates that the write operation is to be executed.
MS0547-E-01
1-3. ACKNOWLEDGE
1-4. FIRST BYTE
SCL FROM
MASTER
DATA
OUTPUT BY
TRANSMITTER
DATA
OUTPUT BY
RECEIVER
CONDITION
START
1
0
Figure 18. Acknowledge on the I
1
0
Figure 19. The First Byte
(Those CAD1/0 should match with CAD1/0 pins.)
0
- 32 -
0
CAD1
2
C-bus
CAD0
8
R/W
not acknowledge
acknowledge
Clock pulse
for acknowledge
9
[AK4140]
2007/03