ak4527b AKM Semiconductor, Inc., ak4527b Datasheet - Page 6

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ak4527b

Manufacturer Part Number
ak4527b
Description
High Performance Multi-channel Audio Codec
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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ASAHI KASEI
Notes: 1. SDOS, SMUTE, DFS, and LOOP1 pins are ORed with register data if P/S = “L”.
MS0056-E-00
No.
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Pin Name
LOUT3
ROUT3
LOUT2
ROUT2
LOUT1
ROUT1
LIN-
LIN+
RIN-
RIN+
DZF2
OVF
VCOM
VREFH
AVDD
AVSS
DZF1
MCLK
P/S
DIF0
CSN
DIF1
SCL/CCLK
LOOP0
SDA/CDTI
LOOP1
2. The group 1 and 2 can be selected by DZFM2-0 bits if P/S = “L” and DZFE = “L”.
3. This pin becomes OVF pin if OVFE bit is set to “1” at serial control mode.
4. All input pins should not be left floating.
I/O
I/O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
-
-
I
I
I
I
I
I
I
I
DAC3 Lch Analog Output Pin
DAC3 Rch Analog Output Pin
DAC2 Lch Analog Output Pin
DAC2 Rch Analog Output Pin
DAC1 Lch Analog Output Pin
DAC1 Rch Analog Output Pin
Lch Analog Negative Input Pin
Lch Analog Positive Input Pin
Rch Analog Negative Input Pin
Rch Analog Positive Input Pin
Zero Input Detect 2 Pin
Analog Input Overflow Detect Pin (Note 3)
Common Voltage Output Pin, AVDD/2
Positive Voltage Reference Input Pin, AVDD
Analog Power Supply Pin, 4.5V 5.5V
Analog Ground Pin, 0V
Zero Input Detect 1 Pin
Master Clock Input Pin
Parallel/Serial Select Pin
Audio Data Interface Format 0 Pin in parallel control mode
Chip Select Pin in 3-wire serial control mode
Audio Data Interface Format 1 Pin in parallel control mode
Control Data Clock Pin in serial control mode
Loopback Mode 0 Pin in parallel control mode
Control Data Input Pin in serial control mode
Loopback Mode 1 Pin
This pin goes to “H” if the analog input of Lch or Rch is overflows.
When the input data of the group 1 follow total 8192 LRCK cycles with “0” input data,
this pin goes to “H”.
this pin goes to “H”.
“L”: Serial control mode, “H”: Parallel control mode
Large external capacitor around 2.2µF is used to reduce power-supply noise.
When the input data of the group 1 follow total 8192 LRCK cycles with “0” input data,
This pin should be connected to DVDD at I
I2C = “L”: CCLK (3-wire Serial), I2C = “H”: SCL (I
Enables digital loop-back from ADC to 3 DACs.
I2C = “L”: CDTI (3-wire Serial), I2C = “H”: SDA (I
Enables all 3 DAC channels to be input from SDTI1.
- 6 -
(Note 2)
(Note 1)
(Note 2)
Function
2
C bus control mode
2
2
C Bus)
C Bus)
[AK4527B]
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