a3pn060-zvqg100i Actel Corporation, a3pn060-zvqg100i Datasheet - Page 50
a3pn060-zvqg100i
Manufacturer Part Number
a3pn060-zvqg100i
Description
Proasic 3 Nano Flash Fpgas
Manufacturer
Actel Corporation
Datasheet
1.A3PN060-ZVQG100I.pdf
(100 pages)
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Part Number:
A3PN060-ZVQG100I
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ProASIC3 nano DC and Switching Characteristics
Figure 2-12 • Input Register Timing Diagram
Table 2-54 • Input Data Register Propagation Delays
2 -3 6
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
Note:
Enable
Data
Clear
CLK
Preset
Out_1
ICLKQ
ISUD
IHD
ICLR2Q
IPRE2Q
IREMCLR
IRECCLR
IREMPRE
IRECPRE
IWCLR
IWPRE
ICKMPWH
ICKMPWL
For specific junction temperature and voltage supply levels, refer to
values.
Clock-to-Q of the Input Data Register
Data Setup Time for the Input Data Register
Data Hold Time for the Input Data Register
Asynchronous Clear-to-Q of the Input Data Register
Asynchronous Preset-to-Q of the Input Data Register
Asynchronous Clear Removal Time for the Input Data Register
Asynchronous Clear Recovery Time for the Input Data Register
Asynchronous Preset Removal Time for the Input Data Register
Asynchronous Preset Recovery Time for the Input Data Register
Asynchronous Clear Minimum Pulse Width for the Input Data Register
Asynchronous Preset Minimum Pulse Width for the Input Data Register
Clock Minimum Pulse Width HIGH for the Input Data Register
Clock Minimum Pulse Width LOW for the Input Data Register
Input Register
Timing Characteristics
Commercial-Case Conditions: T
50%
50%
t
1
ISUE
t
IHE
50%
50%
t
ISUD
0
t
t
ICLKQ
IHD
50%
50%
J
Description
50%
= 70°C, Worst-Case V
t
IWPRE
t
A d v a n c e v 0. 2
IPRE2Q
50%
50%
t
IRECPRE
50%
t
ICLR2Q
50%
t
IWCLR
50%
50%
CC
50%
= 1.425 V
t
IRECCLR
Table 2-6 on page 2-5
50%
t
ICKMPWH
t
IREMPRE
50%
0.24 0.27 0.32
0.26 0.30 0.35
0.00 0.00 0.00
0.45 0.52 0.61
0.45 0.52 0.61
0.00 0.00 0.00
0.22 0.25 0.30
0.00 0.00 0.00
0.22 0.25 0.30
0.22 0.25 0.30
0.22 0.25 0.30
0.36 0.41 0.48
0.32 0.37 0.43
–2
50%
t
ICKMPWL
–1 Std. Units
for derating
50%
t
50%
IREMCLR
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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