wm9703 ETC-unknow, wm9703 Datasheet - Page 18

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wm9703

Manufacturer Part Number
wm9703
Description
Manufacturer
ETC-unknow
Datasheet
WM9703
AC-LINK AUDIO INPUT FRAME (SDATA_IN)
WOLFSON MICROELECTRONICS LTD
SLOT 2: COMMAND DATA PORT
The command data port is used to deliver 16-bit control register write data in the event that the
current command port operation is a write cycle. (As indicated by slot 1, bit 19).
If the current command port operation is a read then the entire time slot must be stuffed with 0s by
the AC’97 controller.
SLOT 3: PCM PLAYBACK LEFT CHANNEL
Audio output frame slot 3 is the composite digital audio left playback stream. In a typical Games
Compatible PC this slot is composed of standard PCM (.wav) output samples digitally mixed (on the
AC’97 controller or host processor) with music synthesis output samples. If a sample stream of
resolution less than 20-bits is transferred, the AC’97 controller must stuff all trailing non-valid bit
positions within this time slot with 0s.
SLOT 4: PCM PLAYBACK RIGHT CHANNEL
Audio output frame slot 4 is the composite digital audio right playback stream. In a typical Games
Compatible PC this slot is composed of standard PCM (.wav) output samples digitally mixed (on the
AC’97 controller or host processor) with music synthesis output samples.
If a sample stream of resolution less than 20-bits is transferred, the AC’97 controller must stuff all
trailing non-valid bit positions within this time slot with 0s.
SLOT 5: OPTIONAL MODEM LINE CODEC
Audio output frame slot 5 contains the MSB justified modem DAC input data. This optional AC’97
feature is not supported in the WM9703, and if data is written to this location it is ignored. This may
be determined by the AC’97 controller interrogating the WM9703 Vendor ID registers.
SLOTS 6 TO 9: SURROUND SOUND DATA
Audio output frame slots 6 to 9 are used to send surround sound data. This data is mapped onto the
internal DACs depending on Codec ID, see Table 8.
SLOTS 10 AND 11: LINE2 AND HANDSET DAC
These data slots are not supported.
SLOT 12: GPIO CONTROL
These data slots are not supported.
Figure 15 AC-link Audio Input Frame
The audio input frame data streams correspond to the multiplexed bundles of all digital input data
targeting the AC’97 controller. As is the case for audio output frame, each AC-link audio input frame
consists of 12, 20-bit time slots.
Slot 0 is a special reserved time slot containing 16-bits, which are used for AC-link protocol
infrastructure.
Bit (19:4)
Bit (3:0)
SDATA_IN
BIT_CLK
SYNC
END OF PREVIOUS
AUDIO FRAME
CODEC
READY
12.288MHz
TAG PHASE
SLOT(1)
SLOT(2)
(’1’ = TIME SLOT CONTAINS
81.4nS
TIME SLOT ’VALID’ BITS
VALID PCM DATA)
Control register write data (stuffed with 0s if current operation is
a read)
Reserved (stuffed with 0s)
SLOT(12)
’0’
’0’
’0’
19
SLOT (1)
0
19
20.8 S (48kHz)
DATA PHASE
SLOT (2)
0
19
SLOT (3)
PD Rev 3.4 January 2001
0
Production Data
19
SLOT (12)
0
18

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