x5043s8c1038 Intersil Corporation, x5043s8c1038 Datasheet

no-image

x5043s8c1038

Manufacturer Part Number
x5043s8c1038
Description
Cpu Supervisor With 4k Spi Eeprom
Manufacturer
Intersil Corporation
Datasheet
CPU Supervisor with 4K SPI EEPROM
These devices combine four popular functions, Power-on
Reset Control, Watchdog Timer, Supply Voltage Supervision,
and Block Lock Protect Serial EEPROM Memory in one
package. This combination lowers system cost, reduces
board space requirements, and increases reliability.
Applying power to the device activates the power-on reset
circuit which holds RESET/RESET active for a period of
time. This allows the power supply and oscillator to stabilize
before the processor executes code.
The Watchdog Timer provides an independent protection
mechanism for microcontrollers. When the microcontroller
fails to restart a timer within a selectable time out interval,
the device activates the RESET/RESET signal. The user
selects the interval from three preset values. Once selected,
the interval does not change, even after cycling the power.
The device’s low V
system from low voltage conditions, resetting the system
when V
RESET/RESET is asserted until V
operating level and stabilizes. Four industry standard V
thresholds are available, however, Intersil’s unique circuits
allow the threshold to be reprogrammed to meet custom
requirements or to fine-tune the threshold for applications
requiring higher precision.
The memory portion of the device is a CMOS Serial
EEPROM array with Intersil’s block lock protection. The
array is internally organized as 512 x 8. The device features
a Serial Peripheral Interface (SPI) and software protocol
allowing operation on a simple four-wire bus.
The device utilizes Intersil’s proprietary Direct Write
providing a minimum endurance of 100,000 cycles and a
minimum data retention of 100 years.
CC
falls below the minimum V
CC
detection circuitry protects the user’s
®
1
CC
Data Sheet
CC
returns to proper
trip point.
cell,
1-888-INTERSIL or 1-888-468-3774
TRIP
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• Low V
• Selectable Time Out Watchdog Timer
• Long Battery Life with Low Power Consumption
• 4Kbits of EEPROM–1M Write Cycle Endurance
• Save Critical Data with Block Lock
• Built-in Inadvertent Write Protection
• SPI Interface - 3.3MHz Clock Rate
• Minimize Programming Time
• Available Packages
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Communications Equipment
• Industrial Systems
• Computer Systems
• Battery Powered Equipment
- Four standard reset threshold voltages
- Re-program low V
- Reset signal valid to V
- <50µA max standby current, watchdog on
- <10µA max standby current, watchdog off
- Protect 1/4, 1/2, all or none of EEPROM array
- Write enable latch
- Write protect pin
- 16-byte page write mode
- 5ms write cycle time (typical)
- 8 Ld MSOP, 8 Ld SOIC, 8 Ld PDIP
- 14 Ld TSSOP
- Routers, Hubs, Switches
- Set Top Boxes
- Process Control
- Intelligent Instrumentation
- Desktop Computers
- Network Servers
4.63V, 4.38V, 2.93V, 2.63V
special programming sequence.
March 16, 2006
All other trademarks mentioned are the property of their respective owners.
CC
|
Detection and Reset Assertion
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved
CC
reset threshold voltage using
CC
X5043, X5045
= 1V
4K, 512 x 8 Bit
Memory
FN8126.2

Related parts for x5043s8c1038

x5043s8c1038 Summary of contents

Page 1

Data Sheet CPU Supervisor with 4K SPI EEPROM These devices combine four popular functions, Power-on Reset Control, Watchdog Timer, Supply Voltage Supervision, and Block Lock Protect Serial EEPROM Memory in one package. This combination lowers system cost, reduces board ...

Page 2

Typical Application 2.7-5.0V VCC 10K X5043 RESET CS SCK VSS Block Diagram + TRIP Watchdog Transition Detector CS/WDI Command SI Decode & SO Control Logic SCK WP Protect Logic 2 X5043, X5045 VCC ...

Page 3

Ordering Information PART NUMBER RESET PART (ACTIVE LOW) MARKING X5043P-4.5A X5043P AL X5045P-4.5A X5043PZ-4.5A (Note) X5043P Z AL X5045PZ-4.5A (Note) X5045P Z AL X5043PI-4.5A X5043P AM X5045PI-4.5A X5043PIZ-4.5A (Note) X5043P Z AM X5045PIZ-4.5A (Note) X5045P Z AM X5043S8-4.5A X5043 AL ...

Page 4

Ordering Information (Continued) PART NUMBER RESET PART (ACTIVE LOW) MARKING X5043P-2.7A X5043P AN X5045P-2.7A X5043PZ-2.7A (Note) X5043P Z AN X5045PZ-2.7A (Note) X5045P Z AN X5043PI-2.7A X5043P AP X5045PI-2.7A X5043PIZ-2.7A (Note) X5043P Z AP X5045PIZ-2.7A (Note) X5045P Z AP X5043S8-2.7A* X5043 ...

Page 5

Pin Configuration 8 Ld SOIC/PDIP/MSOP CS/WDI X5043, X5045 TSSOP X5043, X5045 ...

Page 6

V Threshold Reset Procedure CC The X5043, X5045 are shipped with a standard V threshold (V ) voltage. This value will not change over TRIP ...

Page 7

SCK SI 06h WREN FIGURE 2. RESET Adjust V TRIP Adj. Run 7 X5043, X5045 V = 15-18V ...

Page 8

V Programming TRIP Execute Reset V TRIP Sequence Set Applied = CC CC Desired V TRIP New V Applied CC Execute = Set V Old V Applied TRIP CC Sequence - Error Apply ...

Page 9

Write Enable Latch The device contains a Write Enable Latch. This latch must be SET before a Write Operation is initiated. The WREN instruction will set the latch and the WRDI instruction will reset the latch (Figure 5). This latch ...

Page 10

WREN CMD (WEL) DEVICE PIN (WP SCK SI High Impedance SCK SI High Impedance SO 10 X5043, X5045 TABLE 2. DEVICE PROTECT MATRIX MEMORY BLOCK PROTECTED AREA UNPROTECTED AREA ...

Page 11

Read Memory Array When reading from the EEPROM memory array first pulled low to select the device. The 8-bit READ instruction is transmitted to the device, followed by the 8-bit address. Bit 3 of the READ instruction selects ...

Page 12

SCK Instruction SCK Data Byte Operational Notes The device powers-up in the following state: 1. The device is in ...

Page 13

Absolute Maximum Ratings Temperature under bias . . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C Storage temperature . . . . . . . . ...

Page 14

Equivalent A.C. Load Circuit 1.64kΩ Output RESET/RESET 1.64kΩ 30pF AC Electrical Specifications (Over recommended operating conditions, unless otherwise specified) SYMBOL DATA INPUT TIMING f Clock Frequency SCK t Cycle Time CYC t CS Lead Time LEAD ...

Page 15

Serial Output Timing CS SCK t V MSB Out SO ADDR SI LSB IN Serial Input Timing CS t LEAD SCK t SU MSB In SI High Impedance SO Symbol Table WAVEFORM INPUTS Must be steady May change from LOW ...

Page 16

Power-Up and Power-Down Timing V CC RESET (X5043) RESET (X5045) RESET Output Timing SYMBOL V Reset Trip Point Voltage, (-4.5A) TRIP Reset Trip Point Voltage, (Blank) Reset Trip Point Voltage, (-2.7A) Reset Trip Point Voltage, (-2.7) t Power-up Reset Time ...

Page 17

V Programming Timing Diagram TRIP TRIP VPS CS SCK SI 06h V Programming Parameters TRIP PARAMETER t V Program Enable Voltage Setup time VPS TRIP t V Program Enable Voltage Hold time ...

Page 18

Packaging Information 8-Lead Miniature Small Outline Gull Wing Package Type M 0.012 + 0.006 / -0.002 (0.30 + 0.15 / -0.05) 0.040 ± 0.002 (1.02 ± 0.05) 0.007 (0.18) 0.005 (0.13) 18 X5043, X5045 0.118 ± 0.002 (3.00 ± 0.05) ...

Page 19

Packaging Information Half Shoulder Width On All End Pins Optional .073 (1.84) Typ. 0.010 (0.25) NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH 19 X5043, X5045 8-Lead Plastic Dual In-Line Package Type ...

Page 20

Packaging Information 8-Lead Plastic Small Outline Gull Wing Package Type S Pin 1 Index 0.010 (0.25) 0.020 (0.50) 0° - 8° 0.016 (0.410) 0.037 (0.937) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 20 X5043, X5045 Pin 1 0.014 ...

Page 21

... Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...

Related keywords