x5163s8zt2 Intersil Corporation, x5163s8zt2 Datasheet

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x5163s8zt2

Manufacturer Part Number
x5163s8zt2
Description
Cpu Supervisor With 16kbit Spi Eeprom
Manufacturer
Intersil Corporation
Datasheet
CPU Supervisor with 16Kbit SPI EEPROM
Description
These devices combine four popular functions, Power-on
Reset Control, Watchdog Timer, Supply Voltage Supervision,
and Block Lock Protect Serial EEPROM Memory in one
package. This combination lowers system cost, reduces
board space requirements, and increases reliability.
Applying power to the device activates the power-on reset
circuit which holds RESET/RESET active for a period of
time. This allows the power supply and oscillator to stabilize
before the processor can execute code.
The Watchdog Timer provides an independent protection
mechanism for microcontrollers. When the microcontroller
fails to restart a timer within a selectable time out interval, the
device activates the RESET/RESET signal. The user selects
the interval from three preset values. Once selected, the
interval does not change, even after cycling the power.
The device’s low V
system from low voltage conditions, resetting the system when
V
asserted until V
stabilizes. Five industry standard V
available, however, Intersil’s unique circuits allow the
threshold to be reprogrammed to meet custom requirements
or to fine-tune the threshold for applications requiring higher
precision.
Pinouts
CC
falls below the minimum V
CS/WDI
CC
V
WP
SO
SS
CC
returns to proper operating level and
detection circuitry protects the user’s
1
2
3
4
8 Ld SOIC/PDIP
®
X5163, X5165
X5163, X5165
CC
1
trip point. RESET/RESET is
TRIP
Data Sheet
thresholds are
8
7
6
5
V
RESET/RESET
SCK
SI
CC
1-888-INTERSIL or 1-888-468-3774
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• Selectable watchdog timer
• Low V
• Determine watchdog or low voltage reset with a volatile
• Long battery life with low power consumption
• 16kbits of EEPROM
• Built-in inadvertent write protection
• 2MHz SPI interface modes (0,0 & 1,1)
• Minimize EEPROM programming time
• 2.7V to 5.5V and 4.5V to 5.5V power supply operation
• Available packages: 14 Ld TSSOP, 8 Ld SOIC, 8 Ld PDIP
• Pb-free plus anneal available (RoHS compliant)
CS/WDI
- Five standard reset threshold voltages
- Re-program low V
- Reset signal valid to V
flag bit
- <50µA max standby current, watchdog on
- <1µA max standby current, watchdog off
- <400µA max active current during read
- Power-up/power-down protection circuitry
- Protect 0, 1/4, 1/2 or all of EEPROM array with Block
- In-circuit programmable ROM mode
- 32-byte page write mode
- Self-timed write cycle
- 5ms write cycle time (typical)
special programming sequence
Lock
V
WP
SO
NC
NC
NC
SS
All other trademarks mentioned are the property of their respective owners.
CC
June 1, 2006
|
detection and reset assertion
protection
Intersil (and design) is a registered trademark of Intersil Americas Inc.
1
2
3
4
5
6
7
14 Ld TSSOP
X5163, X5165
Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved
CC
14
13
12
11
10
9
8
reset threshold voltage using
CC
= 1V
V
RESET/RESET
NC
NC
NC
SCK
SI
X5163, X5165
CC
FN8128.3

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